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開始行:
[[Akram-Thesis]]
CENTER:SIZE(40){COLOR(blue){High-throughput and Reliable Routing Algorithms, Architecture, and Design for Manycore Three-dimensional Network-on-Chip Systems}}
* Abstract [#b34664d9]
* Chapter 1: Introduction [#ic4cc8fa]
- Technology scaling
- Conventional interconnect paradigms and problems
- NoC interconnect, advantages, and disadvantages
- 3D-ICs and 3D-NoC
- Reliability issues
- Briefly describe the works done so far to address reliability in 3D-NoC
- Thesis Contribution
- Thesis Organization
* Chapter 2: Fault-Tolerant Network-on-Chip [#cc822b92]
- NoC main components and parameters
- 3D-NoC special features (different components and parameters from 2D-NoC)
3D-NoC advantages and challenges
- Fault models
- Fault consequences
- Failure causes
- Failures classification (locality and time)
- Detection mechanisms (codes, BIST)
* Chapter 3: Related work [#jdd91cf7]
- Routing algorithms
- router architectures
* Chapter 4: Fault-tolerant routing algorithms [#nfb1bd26]
- Look-Ahead-XYZ (LAXYZ)
- Look-Ahead-Fault-Tolerant (LAFT)
- Hybrid-Look-Ahead-Fault-Tolerant (HLAFT)
* Chapter 5: Reliable router architecture [#hd8144ff]
- Router block diagram
- Pipeline stages
- Bypass-Link-on-Demand
- Random Access Buffer (RAB)
-- Deadlock recovery
-- Fault tolerance
- Traffic-Prediction-Unit
-- Block diagram
-- Prediction Table
-Fault Control Module
* Chapter 6: System architecture [#n1508e69]
- System topology
- Layers structure
- Prototyping steps
- TSV characteristics
-
* Chapter 7: Evaluation and Design [#g9061239]
- Methodology
-- Benchmarks
-- Parameters
- BLoD evaluation
- RAB evaluation
- RAB+TPU evaluation
- Router latency evaluation
- Router Throughput evaluation
* Chapter 8: Conclusion & Future work [#of8e5ae1]
----
Last update: Wednesday, July 9th (Akram)
終了行:
[[Akram-Thesis]]
CENTER:SIZE(40){COLOR(blue){High-throughput and Reliable Routing Algorithms, Architecture, and Design for Manycore Three-dimensional Network-on-Chip Systems}}
* Abstract [#b34664d9]
* Chapter 1: Introduction [#ic4cc8fa]
- Technology scaling
- Conventional interconnect paradigms and problems
- NoC interconnect, advantages, and disadvantages
- 3D-ICs and 3D-NoC
- Reliability issues
- Briefly describe the works done so far to address reliability in 3D-NoC
- Thesis Contribution
- Thesis Organization
* Chapter 2: Fault-Tolerant Network-on-Chip [#cc822b92]
- NoC main components and parameters
- 3D-NoC special features (different components and parameters from 2D-NoC)
3D-NoC advantages and challenges
- Fault models
- Fault consequences
- Failure causes
- Failures classification (locality and time)
- Detection mechanisms (codes, BIST)
* Chapter 3: Related work [#jdd91cf7]
- Routing algorithms
- router architectures
* Chapter 4: Fault-tolerant routing algorithms [#nfb1bd26]
- Look-Ahead-XYZ (LAXYZ)
- Look-Ahead-Fault-Tolerant (LAFT)
- Hybrid-Look-Ahead-Fault-Tolerant (HLAFT)
* Chapter 5: Reliable router architecture [#hd8144ff]
- Router block diagram
- Pipeline stages
- Bypass-Link-on-Demand
- Random Access Buffer (RAB)
-- Deadlock recovery
-- Fault tolerance
- Traffic-Prediction-Unit
-- Block diagram
-- Prediction Table
-Fault Control Module
* Chapter 6: System architecture [#n1508e69]
- System topology
- Layers structure
- Prototyping steps
- TSV characteristics
-
* Chapter 7: Evaluation and Design [#g9061239]
- Methodology
-- Benchmarks
-- Parameters
- BLoD evaluation
- RAB evaluation
- RAB+TPU evaluation
- Router latency evaluation
- Router Throughput evaluation
* Chapter 8: Conclusion & Future work [#of8e5ae1]
----
Last update: Wednesday, July 9th (Akram)
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