Ryuya Okada
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開始行:
[[<---Back>OASIS]]
//CENTER:SIZE(20){COLOR(#990199){''HIRN: High-Radix NoC Project''}}
CENTER:SIZE(30){COLOR(#990199){''研究テーマ: Architecture and Design of Core Network Interface for Distributed Routing in OASIS NoC''}}
----
**0. Background - Routing Methods [#lccd234c]
Routing methods are used to determine the route followed by the message in the network on chip. Communication performance of a NoC greatly depends on the implemented routing methods.
The routing methods are generally classified into distributed and source routing:
-Distributed Routing:
In distributed routing the routing functions are implemented in each router of the network. ''Packet header is very compact''. It carries the destination address and some control bits. Each router contains information about the neighbour routers. When the packet arrives at the input port of the router, the route path is selected either by looking up the routing tables or executing the routing function in HW. OASIS uses a so called [[look-ahead routing technique]]
As the router used for distributed routing requires additional hardware for execution of routing logic and extra memory unit to store the routing tables, ''so the design of the router can be complex''. Distributed routing is favourable for regular topologies so that same implementation can be used for all routers.
-Source Routing:
In source routing the information about the route from source to destination is written in the packet header at the source end. The ''source makes all routing decisions before packet transmitted into the network''. The routing tables are placed inside the NI. The tables are filled with routing information. The sender NI selects route path from the tables and placed this information in packet header. The packet is transmitted in the network through NI. When packet reaches at an intermediate router, the route path is read from packet header and forwarded to corresponding neighbour router till it reaches the destination.
--Path Computation in source routing:
Path computation is to find the complete route information from a source core to a destination core. In source routing, the route path from every core to the other cores in the network should be computed. For example, in an 8X8 NoC every core will have the complete route path information of other 63 cores as destinations.
--Choice of Path Computation:
There are two ways to carry out path computation:
---First method is to compute paths and store them in each resource in the form of tables.
---The second method is to compute the paths at runtime using an algorithm in each resource. The second method is costlier and slow.
The table based path computation method may be selected. The complete Path Computation can be calculated with Matlab Tool for source routing.
So it is a good idea to use an existing tool to compute paths offline for source routing and store them in the memory of every source core in the network.
** 1. Research Motivation [#y892a908]
-[[HIRN>http://aslweb.u-aizu.ac.jp/benlab/index.php?Internal%2FHIRN]], and OASIS/[[OASIS-SPL>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Uesaka-BS-10/s1150030.pdf]] NoCs have no Network Interface (NI). So, they can't evaluate real benchmark. Current evaluation is not accurate. In order to evaluate NoC, we need NI.
***2. Research Goal [#j5e43d03]
-Design and Prototyping of Network Interface for Distributed Routing
CENTER:&ref(ni-okada.gif,,80%);
CENTER:Distributed Routing NI Interfacing
***3. Research Plan [#e2a06435]
-Understand [[Uesaka's graduation thesis>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Uesaka-BS-10/s1150030.pdf]].
--understand and simulate the SPL algorithm
-Understand Ref. "Architecture and Design of OASIS NoC with Short-Pass Link (SPL)", "NETWORK INTERFACES FOR NETWORK ON CHIP"
-''Propose Architecture of a Network Interface for Distributed Routing''
-Make NI hardware in Verilog HDL
//-Integrate the NI with OASIS-SPL NoC
-Make simulation
--Correctness
--Performance
--Complexity
--Power
-Implement NI with Nios II system on DE2 board
//--Compare with OASIS-SPL NoC
-Write thesis (Dec., Jan.)
*** 4. References for My Research[#s98cdd8b]
-Takahiro Uesaka, [[OASIS NoC Topology Optimization with ShortPath Link>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Uesaka-BS-10/s1150030.pdf]],Graduation Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Uesaka-BS-10/s1150030_GT2010.ppt]]
-[[PDF>http://web-int.u-aizu.ac.jp/~benab/classes/aco/lectures/lec-invited/noc-invited-062011.pdf]] Invited Lecture: OASIS NoC Case Study - Real Design of a Network-on-Chip Architecture, ACO, 2011.
----
*Network Interface Test Programs [#i8b4c364]
-[[Test 1 and 2>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=Appendix-1-and-2.txt&refer=Internal%2FOkada]]
Update History:
--01/27/2012: Background added!
--08/17/2011: NI Block Diagram added
終了行:
[[<---Back>OASIS]]
//CENTER:SIZE(20){COLOR(#990199){''HIRN: High-Radix NoC Project''}}
CENTER:SIZE(30){COLOR(#990199){''研究テーマ: Architecture and Design of Core Network Interface for Distributed Routing in OASIS NoC''}}
----
**0. Background - Routing Methods [#lccd234c]
Routing methods are used to determine the route followed by the message in the network on chip. Communication performance of a NoC greatly depends on the implemented routing methods.
The routing methods are generally classified into distributed and source routing:
-Distributed Routing:
In distributed routing the routing functions are implemented in each router of the network. ''Packet header is very compact''. It carries the destination address and some control bits. Each router contains information about the neighbour routers. When the packet arrives at the input port of the router, the route path is selected either by looking up the routing tables or executing the routing function in HW. OASIS uses a so called [[look-ahead routing technique]]
As the router used for distributed routing requires additional hardware for execution of routing logic and extra memory unit to store the routing tables, ''so the design of the router can be complex''. Distributed routing is favourable for regular topologies so that same implementation can be used for all routers.
-Source Routing:
In source routing the information about the route from source to destination is written in the packet header at the source end. The ''source makes all routing decisions before packet transmitted into the network''. The routing tables are placed inside the NI. The tables are filled with routing information. The sender NI selects route path from the tables and placed this information in packet header. The packet is transmitted in the network through NI. When packet reaches at an intermediate router, the route path is read from packet header and forwarded to corresponding neighbour router till it reaches the destination.
--Path Computation in source routing:
Path computation is to find the complete route information from a source core to a destination core. In source routing, the route path from every core to the other cores in the network should be computed. For example, in an 8X8 NoC every core will have the complete route path information of other 63 cores as destinations.
--Choice of Path Computation:
There are two ways to carry out path computation:
---First method is to compute paths and store them in each resource in the form of tables.
---The second method is to compute the paths at runtime using an algorithm in each resource. The second method is costlier and slow.
The table based path computation method may be selected. The complete Path Computation can be calculated with Matlab Tool for source routing.
So it is a good idea to use an existing tool to compute paths offline for source routing and store them in the memory of every source core in the network.
** 1. Research Motivation [#y892a908]
-[[HIRN>http://aslweb.u-aizu.ac.jp/benlab/index.php?Internal%2FHIRN]], and OASIS/[[OASIS-SPL>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Uesaka-BS-10/s1150030.pdf]] NoCs have no Network Interface (NI). So, they can't evaluate real benchmark. Current evaluation is not accurate. In order to evaluate NoC, we need NI.
***2. Research Goal [#j5e43d03]
-Design and Prototyping of Network Interface for Distributed Routing
CENTER:&ref(ni-okada.gif,,80%);
CENTER:Distributed Routing NI Interfacing
***3. Research Plan [#e2a06435]
-Understand [[Uesaka's graduation thesis>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Uesaka-BS-10/s1150030.pdf]].
--understand and simulate the SPL algorithm
-Understand Ref. "Architecture and Design of OASIS NoC with Short-Pass Link (SPL)", "NETWORK INTERFACES FOR NETWORK ON CHIP"
-''Propose Architecture of a Network Interface for Distributed Routing''
-Make NI hardware in Verilog HDL
//-Integrate the NI with OASIS-SPL NoC
-Make simulation
--Correctness
--Performance
--Complexity
--Power
-Implement NI with Nios II system on DE2 board
//--Compare with OASIS-SPL NoC
-Write thesis (Dec., Jan.)
*** 4. References for My Research[#s98cdd8b]
-Takahiro Uesaka, [[OASIS NoC Topology Optimization with ShortPath Link>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Uesaka-BS-10/s1150030.pdf]],Graduation Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Uesaka-BS-10/s1150030_GT2010.ppt]]
-[[PDF>http://web-int.u-aizu.ac.jp/~benab/classes/aco/lectures/lec-invited/noc-invited-062011.pdf]] Invited Lecture: OASIS NoC Case Study - Real Design of a Network-on-Chip Architecture, ACO, 2011.
----
*Network Interface Test Programs [#i8b4c364]
-[[Test 1 and 2>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=Appendix-1-and-2.txt&refer=Internal%2FOkada]]
Update History:
--01/27/2012: Background added!
--08/17/2011: NI Block Diagram added
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