Ryoga Okada
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開始行:
CENTER:SIZE(40){COLOR(blue){Power and Performance Comparison of Electronic 2D-NoC and Opto-Electronic 2D-NoC }}
[[Members-Internal]]
-Student ID: s1200124
*Background (Problem Definition) [#m0241ad5]
The huge computing power of many-core multi-processor systems will require very large on-chip and off-chip data transfer rates (> 100TB/s). One efficient technology for transmitting this level of information is the optical interconnects, which promise significant advantages over their electronic counterparts. In particular, optical on-chip interconnect (ONoC)) offers a potentially disruptive technology solution with fundamentally low power dissipation that remains independent of capacity while providing ultra-high throughput and minimal access latency. In addition, when combined with 3D integration technology, ONoC offers advantages over 2D NoC design, such as shorter wire length, higher packing density, and smaller footprint.
Understanding power and performance of Photonic Network-on-Chip is an important step towards the design of an efficient NoC system in hardware.
CENTER:&ref(PhoenixSim.jpg,,80%);
CENTER:COLOR(green){Sample Output}
*Research Goal [#p493636b]
The goal of this research is to study and compare power and performance of Electrical NoC with Photonic NoC using Software Simulation.
*Research Schedule [#k3603c5b]
***Step 0 (Mentor: D3 Achraf), COLOR(red){Completion Date: 7/24} [#sf5618b7]
-Take the Guidance Lectures: http://aslweb.u-aizu.ac.jp/aslint/index.php?Guidance%20Lectures#gb3fdf90
***Step 1 COLOR(red){Completion Date: August 15, 2015.} [#ue217f7b]
-Read these references.
---What is NoC? [[Slides 1>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Mori-MS-11/m5141120_2011_MS_slides.pdf]]; [[Slides 2>http://web-ext.u-aizu.ac.jp/~benab/classes/aco/lectures/noc-invited/invited_05_6_2014.pdf]]
---[[Advanced Design Issues for OASIS Network-on-Chip Architecture>http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5633769]]
//---[[Hybrid Photonic NoC based on Non-blocking Photonic Switch and Light-weight Electronic Router>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/Publication/SMC_2015/SMC_2015/SMC_2015.pdf]]
//---[[Low-overhead Path-setup Algorithm for Energy-efficient Hybrid Silicon-Photonic Network-on-Chip Systems>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/Publication/ICAST_2015/ICAST_2015/ICAST2015_Final.pdf]]
***Step 2 COLOR(red){Completion Date: August 30, 2015.} [#c25da4dc]
- COLOR(blue){Install PhoenixSim Simulator on your machine.}
--COLOR(red){How to install?} --> Read the following documents:
---Introduction To Network Simulation With OMNET++: A case of PhoenixSim. [[(PDF)>http://www.u-aizu.ac.jp/~benab/research/projects/PHENIC/simulator/PhoenixSim/PhoenixSim_Tutorial.pdf]]
--- [[PhoenixSim 1.0 source files>http://www.u-aizu.ac.jp/~benab/research/projects/PHENIC/simulator/PhoenixSim/PhoenixSim-v0.3b.zip]]
--- [[PhoenixSim 1.0 user manual>http://web-ext.u-aizu.ac.jp/~benab/research/projects/PHENIC/simulator/PhoenixSim/PhoenixSim.pdf]]
***Step 3 COLOR(red){Completion Date: September 20, 2015.} [#ac2a93d4]
-Performance Study
--Simulate 16, 64, and 128 cores Photonic NoC and Electronic NoC systems with different benchmarks.
--Study and compare: Power, Throughput, etc.
***Step 4 [#q7e58d5c]
-Evaluation
***Step 5 [#cc81612e]
-Thesis writing
*References [#u17e302f]
***PhoenixSim [#z53fb0c6]
-Introduction To Network Simulation With OMNET++: A case of PhoenixSim. [[(PDF)>http://www.u-aizu.ac.jp/~benab/research/projects/PHENIC/simulator/PhoenixSim/PhoenixSim_Tutorial.pdf]]
- [[PhoenixSim 1.0 source files>http://www.u-aizu.ac.jp/~benab/research/projects/PHENIC/simulator/PhoenixSim-v0.3b.zip]]
- [[PhoenixSim 1.0 user manual>http://www.u-aizu.ac.jp/~benab/research/projects/PHENIC/simulator/PhoenixSim.pdf]]
PHENIC NoC Systems Papers:
-Achraf Ben Ahmed, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, ''Hybrid Photonic NoC based on Non-blocking Photonic Switch and Light-weight Electronic Router'', COLOR(olive){Proc. of the IEEE International Conference on Systems, Man, and Cybernetics (SMC2015), Oct. 9-12, 2015.}
[[(PAPER>http://www.u-aizu.ac.jp/~benab/publications/conferences/SMC2015-2/PID3794913.pdf]])
-[[前論文テーマ (Previous GT)>http://aslweb.u-aizu.ac.jp/aslint/index.php?Theses]]
***Verilog Code [#g8eed850]
-[[3D OASIS NoC Verilog HDL Code>http://aslweb.u-aizu.ac.jp/aslint/index.php?3D-ONoC-Verilog]]
終了行:
CENTER:SIZE(40){COLOR(blue){Power and Performance Comparison of Electronic 2D-NoC and Opto-Electronic 2D-NoC }}
[[Members-Internal]]
-Student ID: s1200124
*Background (Problem Definition) [#m0241ad5]
The huge computing power of many-core multi-processor systems will require very large on-chip and off-chip data transfer rates (> 100TB/s). One efficient technology for transmitting this level of information is the optical interconnects, which promise significant advantages over their electronic counterparts. In particular, optical on-chip interconnect (ONoC)) offers a potentially disruptive technology solution with fundamentally low power dissipation that remains independent of capacity while providing ultra-high throughput and minimal access latency. In addition, when combined with 3D integration technology, ONoC offers advantages over 2D NoC design, such as shorter wire length, higher packing density, and smaller footprint.
Understanding power and performance of Photonic Network-on-Chip is an important step towards the design of an efficient NoC system in hardware.
CENTER:&ref(PhoenixSim.jpg,,80%);
CENTER:COLOR(green){Sample Output}
*Research Goal [#p493636b]
The goal of this research is to study and compare power and performance of Electrical NoC with Photonic NoC using Software Simulation.
*Research Schedule [#k3603c5b]
***Step 0 (Mentor: D3 Achraf), COLOR(red){Completion Date: 7/24} [#sf5618b7]
-Take the Guidance Lectures: http://aslweb.u-aizu.ac.jp/aslint/index.php?Guidance%20Lectures#gb3fdf90
***Step 1 COLOR(red){Completion Date: August 15, 2015.} [#ue217f7b]
-Read these references.
---What is NoC? [[Slides 1>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Mori-MS-11/m5141120_2011_MS_slides.pdf]]; [[Slides 2>http://web-ext.u-aizu.ac.jp/~benab/classes/aco/lectures/noc-invited/invited_05_6_2014.pdf]]
---[[Advanced Design Issues for OASIS Network-on-Chip Architecture>http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5633769]]
//---[[Hybrid Photonic NoC based on Non-blocking Photonic Switch and Light-weight Electronic Router>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/Publication/SMC_2015/SMC_2015/SMC_2015.pdf]]
//---[[Low-overhead Path-setup Algorithm for Energy-efficient Hybrid Silicon-Photonic Network-on-Chip Systems>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/Publication/ICAST_2015/ICAST_2015/ICAST2015_Final.pdf]]
***Step 2 COLOR(red){Completion Date: August 30, 2015.} [#c25da4dc]
- COLOR(blue){Install PhoenixSim Simulator on your machine.}
--COLOR(red){How to install?} --> Read the following documents:
---Introduction To Network Simulation With OMNET++: A case of PhoenixSim. [[(PDF)>http://www.u-aizu.ac.jp/~benab/research/projects/PHENIC/simulator/PhoenixSim/PhoenixSim_Tutorial.pdf]]
--- [[PhoenixSim 1.0 source files>http://www.u-aizu.ac.jp/~benab/research/projects/PHENIC/simulator/PhoenixSim/PhoenixSim-v0.3b.zip]]
--- [[PhoenixSim 1.0 user manual>http://web-ext.u-aizu.ac.jp/~benab/research/projects/PHENIC/simulator/PhoenixSim/PhoenixSim.pdf]]
***Step 3 COLOR(red){Completion Date: September 20, 2015.} [#ac2a93d4]
-Performance Study
--Simulate 16, 64, and 128 cores Photonic NoC and Electronic NoC systems with different benchmarks.
--Study and compare: Power, Throughput, etc.
***Step 4 [#q7e58d5c]
-Evaluation
***Step 5 [#cc81612e]
-Thesis writing
*References [#u17e302f]
***PhoenixSim [#z53fb0c6]
-Introduction To Network Simulation With OMNET++: A case of PhoenixSim. [[(PDF)>http://www.u-aizu.ac.jp/~benab/research/projects/PHENIC/simulator/PhoenixSim/PhoenixSim_Tutorial.pdf]]
- [[PhoenixSim 1.0 source files>http://www.u-aizu.ac.jp/~benab/research/projects/PHENIC/simulator/PhoenixSim-v0.3b.zip]]
- [[PhoenixSim 1.0 user manual>http://www.u-aizu.ac.jp/~benab/research/projects/PHENIC/simulator/PhoenixSim.pdf]]
PHENIC NoC Systems Papers:
-Achraf Ben Ahmed, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, ''Hybrid Photonic NoC based on Non-blocking Photonic Switch and Light-weight Electronic Router'', COLOR(olive){Proc. of the IEEE International Conference on Systems, Man, and Cybernetics (SMC2015), Oct. 9-12, 2015.}
[[(PAPER>http://www.u-aizu.ac.jp/~benab/publications/conferences/SMC2015-2/PID3794913.pdf]])
-[[前論文テーマ (Previous GT)>http://aslweb.u-aizu.ac.jp/aslint/index.php?Theses]]
***Verilog Code [#g8eed850]
-[[3D OASIS NoC Verilog HDL Code>http://aslweb.u-aizu.ac.jp/aslint/index.php?3D-ONoC-Verilog]]
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