PHENIC_Control
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開始行:
CENTER:SIZE(25){COLOR(red){Design and Analysis of Electrical Control Router for PHENIC NoC System}}
----
[[<== Back to PHENIC Project>http://aslweb.u-aizu.ac.jp/aslint/index.php?PHENIC]]
----
*Members [#c666ea7a]
-B4 Yuji Murakami(村上 侑司) s1210019@u-aizu.ac.jp
-D3 Mike (Mentor)
*Background [#l602c090]
CENTER:&ref(PHENIC_ECN.jpg,,60%);
CENTER:PHENIC Control Router
*Research Goal [#j49931e0]
-Hardware design and evaluation of Electrical Control Router for Photonic Network-on-Chip Systems.
*Research Schedule [#k3603c5b]
***Step 1: Reference Reading. [#b49dca63]
-[[GT2015.pdf>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/KenSaito-BS-16/KenSaito-BS-16-gt.pdf]]; [[GT2015-Slides.pdf>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/KenSaito-BS-16/KenSaito-BS-16-slides.pdf]],
--COLOR(red){Due Date:} Present this at your next RPS on June 3, 2016.
*** Step 2: Run the following tutorial [#x511d6bf]
-[[OASIS 3D Router Design Tutorial with Design Compiler >http://web-ext.u-aizu.ac.jp/~benab/publications/treport/OASIS_Router_PhysicalDesign_technical_report_2014.pdf]].
--COLOR(red){Due Date:} Present this at your next RPR on ??, 2016.
***Other References [#k35a0320]
-[[PHENIC Project Webpage>http://aslweb.u-aizu.ac.jp/aslint/index.php?PHENIC]]
-WCITCA2015 Paper:[[Non-blocking Electro-optic Network-on-Chip Router for High-throughput and Low-power Many-core Systems">http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/WCITCA2015/WCITCA2015_CameraReady.pdf]].
-ICISCE2015 Paper:[[Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/ICISCE2015/ICISCE2015_CR_final.pdf]].
終了行:
CENTER:SIZE(25){COLOR(red){Design and Analysis of Electrical Control Router for PHENIC NoC System}}
----
[[<== Back to PHENIC Project>http://aslweb.u-aizu.ac.jp/aslint/index.php?PHENIC]]
----
*Members [#c666ea7a]
-B4 Yuji Murakami(村上 侑司) s1210019@u-aizu.ac.jp
-D3 Mike (Mentor)
*Background [#l602c090]
CENTER:&ref(PHENIC_ECN.jpg,,60%);
CENTER:PHENIC Control Router
*Research Goal [#j49931e0]
-Hardware design and evaluation of Electrical Control Router for Photonic Network-on-Chip Systems.
*Research Schedule [#k3603c5b]
***Step 1: Reference Reading. [#b49dca63]
-[[GT2015.pdf>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/KenSaito-BS-16/KenSaito-BS-16-gt.pdf]]; [[GT2015-Slides.pdf>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/KenSaito-BS-16/KenSaito-BS-16-slides.pdf]],
--COLOR(red){Due Date:} Present this at your next RPS on June 3, 2016.
*** Step 2: Run the following tutorial [#x511d6bf]
-[[OASIS 3D Router Design Tutorial with Design Compiler >http://web-ext.u-aizu.ac.jp/~benab/publications/treport/OASIS_Router_PhysicalDesign_technical_report_2014.pdf]].
--COLOR(red){Due Date:} Present this at your next RPR on ??, 2016.
***Other References [#k35a0320]
-[[PHENIC Project Webpage>http://aslweb.u-aizu.ac.jp/aslint/index.php?PHENIC]]
-WCITCA2015 Paper:[[Non-blocking Electro-optic Network-on-Chip Router for High-throughput and Low-power Many-core Systems">http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/WCITCA2015/WCITCA2015_CameraReady.pdf]].
-ICISCE2015 Paper:[[Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/ICISCE2015/ICISCE2015_CR_final.pdf]].
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