Miyuka Nakamura
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開始行:
[[Members-Internal]]
CENTER:SIZE(30){COLOR(gold){Design and Optimization of Convolution Neural Network Architecture on FPGA}}
*[[Research Bakground>Miyuka Nakamura - English]] [#ie79e156]
Research on Artificial Intelligence(AI) is actively conducted today. There is a wide variety methods of AI, such as genetic algorithm, reinforcement learning and deep learning. Among them, I focus on convolutional neural networks(CNNs), which is one of the network models of deep learning. CNN is used in several cases; especially image recognition and speech recognition.
I try to implement CNNs on FPGA for low-power Edge applications.
- For GT seminer
-- &ref(mn_20190604.pdf);
*Research Goal [#k46cf7da]
- To optimize CNN with Fixed point implementation and keep almost the same accuracy.
- Use Xilinx board and Vivado design tool
- Use MNIST data set for evaluation
- Study the power consumption, the complexity, the accuracy, the execution time
CENTER:&ref(CNN-Vu2019.jpg,,50%);
*Research schedule [#u0b21ebb]
***Step 1 [#v586a523]
-Read papers, Book: April - June
-''For June 4, 2019''. Prepare slides and include: Title, Research Motivation, Research Goal, Schedule.
-Run the Digit Recognition code on your dektop. Make a summary. Due date: June 7, 2019.
-Run the PostCode Python code on your desktop. Make a summary. Due date: Junme 21, 2019.
-Describe the CNN architecture and the optimization techniques
-''MS exam document preparation (recommendation, research proposal and plan), From June 3 - ''
-GS exam rehearsal
-GS Examination, July 13, 2019.
***Step 2: CNN Partition for FPGA implementation [#cf07a911]
CENTER:&ref(partition.jpg);
CENTER:CNN partition for FPGA implementaiton (LeNet)
Report progress on September 12, 2019. Time: 4 PM
***Step 2: CNN Optimization for FPGA implementation [#y925ab4e]
Date: TBD
If we have a good result, you can submit a paper to: http://www.bigcomputing.org/
If not, we will submit to another conf.
*References [#g3d35207]
-The H. Vu, Ryunosuke Murakami, Yuichi Okuyama, Abderazek Ben Abdallah, [[”Efficient Optimization and Hardware Acceleration of CNNs towards the Design of a Scalable Neuro-inspired Architecture in Hardware”>https://ieeexplore.ieee.org/document/8367135/]], Proc. of the IEEE International Conference on Big Data and Smart Computing (BigComp-2018), pp. 326-332, January 15-18, 2018, Shanghai, China. [paper.pdf], [slides.pdf]
-https://www.spyder-ide.org/
*COLOR(gold){My Shared Google Drive Folder} [#v7f1c3c3]
-[[My Shared Google Drive Folder>https://drive.google.com/drive/folders/1NZ4FjBIewY7T6a8q11E6WhQIUYSWTf4O?usp=sharing]]
-[[MS Miyuka Nakamura]]
終了行:
[[Members-Internal]]
CENTER:SIZE(30){COLOR(gold){Design and Optimization of Convolution Neural Network Architecture on FPGA}}
*[[Research Bakground>Miyuka Nakamura - English]] [#ie79e156]
Research on Artificial Intelligence(AI) is actively conducted today. There is a wide variety methods of AI, such as genetic algorithm, reinforcement learning and deep learning. Among them, I focus on convolutional neural networks(CNNs), which is one of the network models of deep learning. CNN is used in several cases; especially image recognition and speech recognition.
I try to implement CNNs on FPGA for low-power Edge applications.
- For GT seminer
-- &ref(mn_20190604.pdf);
*Research Goal [#k46cf7da]
- To optimize CNN with Fixed point implementation and keep almost the same accuracy.
- Use Xilinx board and Vivado design tool
- Use MNIST data set for evaluation
- Study the power consumption, the complexity, the accuracy, the execution time
CENTER:&ref(CNN-Vu2019.jpg,,50%);
*Research schedule [#u0b21ebb]
***Step 1 [#v586a523]
-Read papers, Book: April - June
-''For June 4, 2019''. Prepare slides and include: Title, Research Motivation, Research Goal, Schedule.
-Run the Digit Recognition code on your dektop. Make a summary. Due date: June 7, 2019.
-Run the PostCode Python code on your desktop. Make a summary. Due date: Junme 21, 2019.
-Describe the CNN architecture and the optimization techniques
-''MS exam document preparation (recommendation, research proposal and plan), From June 3 - ''
-GS exam rehearsal
-GS Examination, July 13, 2019.
***Step 2: CNN Partition for FPGA implementation [#cf07a911]
CENTER:&ref(partition.jpg);
CENTER:CNN partition for FPGA implementaiton (LeNet)
Report progress on September 12, 2019. Time: 4 PM
***Step 2: CNN Optimization for FPGA implementation [#y925ab4e]
Date: TBD
If we have a good result, you can submit a paper to: http://www.bigcomputing.org/
If not, we will submit to another conf.
*References [#g3d35207]
-The H. Vu, Ryunosuke Murakami, Yuichi Okuyama, Abderazek Ben Abdallah, [[”Efficient Optimization and Hardware Acceleration of CNNs towards the Design of a Scalable Neuro-inspired Architecture in Hardware”>https://ieeexplore.ieee.org/document/8367135/]], Proc. of the IEEE International Conference on Big Data and Smart Computing (BigComp-2018), pp. 326-332, January 15-18, 2018, Shanghai, China. [paper.pdf], [slides.pdf]
-https://www.spyder-ide.org/
*COLOR(gold){My Shared Google Drive Folder} [#v7f1c3c3]
-[[My Shared Google Drive Folder>https://drive.google.com/drive/folders/1NZ4FjBIewY7T6a8q11E6WhQIUYSWTf4O?usp=sharing]]
-[[MS Miyuka Nakamura]]
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