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''Contents:''
#Contents
*[[Theses>http://aslweb.u-aizu.ac.jp/aslwiki/index.php?Theses]] [#y31f1ca1]
-Y. Kimezawa,''Towards the Design of Dependable Real-Time System for Remote Health Monitoring of Elderly People'', Master's Thesis, Graduate School of Computer Science and Engineering, The University of Aizu, Feb. 2013. ([[''Slides''>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/Kimesawa-MS-12/m5151117_MS_thesis_slides.pdf]]); ([[''Thesis''>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/Kimesawa-MS-12/m5151117_MS_thesis.pdf]]), (Technical Report),
-Achraf Ben Ahmed, ''Interactive Real-time Interface for Smart Remote Health Monitoring and Analysis'', Master's Thesis, Graduate School of Computer Science and Engineering, The University of Aizu, Feb. 2013 ([[''Slides''>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/Achraf-MS-12/m5151161_MS_thesis_slides.pdf]]);([[''Thesis''>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/Achraf-MS-12/m5151161_2012_MS_thesis.pdf]]); (Technical Report)
-Takayuki Ochi, ''A Quantitative Performance Study of Shared Memory Multicore Systems'', Bachelor Thesis, School of Computer Science and Engineering, The University of Aizu, Feb. 2013 ([[''Slides''>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/Ouchi-BS-12/s1160053_GT2012_slides.pdf]]); ([[''Thesis''>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=s1160053_GT_thesis.dvi&refer=Internal%2FResources]]);(Technical Report)
-Shuu Endou, ''Hardware Prototyping and Evaluation of Distributed Routing Core Network-Interface for OASIS NoC Architecture '', Bachelor Thesis, School of Computer Science and Engineering, The University of Aizu, Feb. 2013 ([[''Slides''>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/Endou-BS-12/s1170180_GT2012_slides.pdf]]); (Thesis) ; (Technical Report)
-Shohei Miura, [[Efficient Design Method for NoC using Monitoring Mechanism: Parameterziable Network-on-Chip>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Miura-MS-11/m5141118_2011_MS_thesis.pdf]] Master's Thesis, The University of Aizu, Feb. 2012. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Miura-MS-11/m5141118_2011_MS_slides.ppt]], [[technical report>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Miura-MS-11/m5141118_2011_MS_tr.pdf]]
-Kenichi Mori, [[OASIS Network-on-Chip Prototyping on FPGA>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Mori-MS-11/m5141120_2011_MS_thesis.pdf]], Master's Thesis, The University of Aizu, Feb. 2012.[[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Mori-MS-11/m5141120_2011_MS_slides.pptx]], [[technical report>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Mori-MS-11/m5141120_2011_MS_tr.pdf]]
-Ben Ahmed Akram, [[On the Design of a 3D Network-on-Chip for Many-core SoC >http://www.u-aizu.ac.jp/~benab/publications/theses/Akram-MS-11/m5141153_2011_MS_thesis.pdf]], Master's Thesis, The University of Aizu, Feb. 2012. [[slides>http://www.u-aizu.ac.jp/~benab/publications/theses/Akram-MS-11//m51411532011_MS_thesis_slides.pdf]]
-Ryuya Okada, [[Architecture and Design of Core Network Interface for Distributed Routing in OASIS NoC>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Okada-BS-11/s1160048_GT2011.pdf]], Graduation Thesis, The University of Aizu, Feb. 2012. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Okada-BS-11/s1160048_GT2011.ppt]]
-Tomotaka Kasahara, [[Design and Implementation of a Multicore Systems>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Kasahara-BS-11/s1160056_GT2011.pdf]], Graduation Thesis, The University of Aizu, Feb. 2012. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Kasahara-BS-11/s1160056_GT2011.ppt]]
-Hiroki Hoshino, [[Development of Parallel Queue Processor Architecture and its Integrated Development Environment>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Hoshino-MS-10/m5131139_2010_MS_thesis.pdf]], Master's Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Hoshino-MS-10/m5131139_2010_MasterThesis.ppt]]
-Taichi Maekawa, [[Design and Evaluation of Dual Mode Processor Architecture>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Maekawa-MS-10/m5131144_Maekawa_MS_thesis.pdf]], Master's Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Maekawa-MS-10/m5131144_Maekawa_MS_presentation.ppt]]
-Masashi Masuda, [[Produced Order Queue Compiler Design>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Masuda-MS-10/m5131145_Masashi_MS_thesis.pdf]], Mater's Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Masuda-MS-10/m5131145_Masashi_MS_Presentation.pdf]]
-Takahiro Uesaka, [[OASIS NoC Topology Optimization with ShortPath Link>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Uesaka-BS-10/s1150030.pdf]],Graduation Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Uesaka-BS-10/s1150030_GT2010.ppt]]
-Shunichi Kato, [[Shared Memory MultiQueueCore Processor Design>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Kato-BS-10/graduation_thesis_final_edition.pdf]],Graduation Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Kato-BS-10/s1150059_GT2010.ppt]]
-Yumiko Kimezawa, [[Multicore SoC Architecture for Realtime Data Intensive ECG Processing>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Kimezawa-BS-10/s1150072_GT2010_Feb122011.pdf]], Graduation Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Kimezawa-BS-10/s1150072_GT2010_Feb122011.ppt]]
-Yuuki Omoto: [["Development Environment for Single Chip Computer Intended for Queue Computing Education">>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Omoto-BS-09/s1100049_GT2009.pdf]],
[[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Omoto-BS-09/GT2009_Yuuki_Omoto_final.ppt]]
- Haga Yasuyoshi: [["Architecture and Design of Application Specific Multicore SoC">http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Haga-BS-09/gt2009.pdf]] , [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Haga-BS-09/GT2009_YasuyoshiHaga_final.pdf]]
- Reo Honjoya.[["Development of User Friendly Assembler for Queue Computers">>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Reo-BS-09/thesis.pdf]], [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Reo-BS-09/GT2009_ReoHonjoya_final.ppt]]
-Mori Kenichi. [["Optimizations Techniques and FPGA Prototyping of OASIS Network-on-Chip">http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Mori-BS-09/thesis.pdf]] , [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Mori-BS-09/GT2009_KenichiMori_final.ppt]]
-Miura Shohei: [["Architecture and Design of Parameterizable Network-on-Chip">http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Miura-BS-09/thesis.pdf]] , [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Miura-BS-09/GT2009_ShoheiMiura_final.ppt]]
-Masashi Masuda, [[Graph Transformation Methods and Theoretical Performance Evaluation of Queue Computation Models >http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Masuda-BS-08/masuda2008.pdf]], Masashi Masuda, The Univ. of Aizu, Feb. 12, 2009. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Masuda-BS-08/masuda-pres-2008.pdf]]
-Hiroki Hoshino, [[Advanced Hardware Optimization Algorithms for High Performance Queue Processor Architecture>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Hoshino-BS-08/hoshino2008.pdf]], Hiroki Hoshino, The Univ. of Aizu, Feb. 12, 2009.[[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Hoshino-BS-08/hoshino-pres-2008.pdf]]
-Taichi Maekawa, [[Research on Hardware Design of Dual-Mode Processor Architecture>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Maekawa-BS-08/maekawa2008.pdf]], Taichi Maekawa, The Univ. of Aizu, Feb. 12, 2009.
[[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Maekawa-BS-08/maekwawa_GT2008_presentation.pdf]]
*Technical Reports [#ibc6e84b]
- A. Ben Abdallah, Research on On-chip network for Multi/Many-core Systems, CED, UoA, Feb. 15, 2012. &ref(pdf-download.gif,,40%); [[(PDf)>http://webfs-int.u-aizu.ac.jp/~benab/publications/treport/CED-UoA-02152012.pdf]]
- Ryuya Okada, A. Ben Abdallah, ''Architecture and Design of Core Network Interface for Distributed Routing in OASIS NoC'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, March 2012, Ref. 16RO-TR12.''' [[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/publications/treport/RyuyaOkada-TR2011.pdf]])
-Kenichi Mori, A. Ben Abdallah, ''OASIS Network-on-Chip Prototyping on FPGA'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, March 2012, Ref. 15KM-TR12.''' [[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/publications/treport/m5141120_2011_MS_tr.pdf]])
-Akram Ben Ahmed, A. Ben Abdallah, ''On the Design of 3D Network-on-Chip'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, March 2012, Ref. 14AKA-TR12.'''[[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/publications/treport/tr_akram.pdf]])
- Y. Kimezawa, A. Ben Abdallah, ''BANSMOM System Organization'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, Feb. 2011, Ref. 13YK-TR11. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/research/projects/bansmom/doc/tr/bansmom_technical_report_022011.pdf]])
-Achraf Ben ahmed, A. Ben Abdallah, ''Running BANSMOM System'',
'''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, July 2011, Ref. 12ACA-TR11.''' [[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/research/projects/bansmom/doc/BANSMOM_DEMO.pdf]])
-S. Miura, A. Ben Abdallah, ''Efficient Design Method for NoC using Monitoring Mechanism: Parameterziable Network-on-Chip'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, March 2012, Ref. 11SM-TR12. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Miura-MS-11/m5141118_2011_MS_tr.pdf]])
-T. Uesaka, A. Ben Abdallah, ''OASIS NoC Topology Optimization with Short-Path Link'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, March 2011, Ref. 10TU-TR10. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/publications/treport/OASIS-SPL_Technical_report_2010.pdf]])
-K. Mori, A. Ben Abdallah, ''OASIS NoC Architecture Design in Verilog HDL'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, June 2010, Ref. 9MK-TR10. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/publications/treport/oasis-noc-design-2010.pdf]])
-A. Ben Abdallah, ''Practical Design Issues of Network-on-Chip'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, Jan. 2010, Ref. 8ABA-TR10. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/publications/invited/NoC-Lecture1_2-KUST.pdf]])
-H. Hoshino, A. Ben Abdallah, ''QSoC - Queue System on Chip on FPGA'', Technical Report, '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, January 2010, Ref. 7HH-TR10.''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/research/projects/QSoC/doc/QSoC32_specification.pdf]])
- K. Uesaka, A. Ben Abdallah, ''Qasm - User Friendly Assembler for Queue Computers'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, The University of Aizu, 2010, Ref. 6KU-TR10.''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/research/projects/Qasm/Qasm_technical_report_2010.pdf]])
-H. Hoshino, A. Ben Abdallah, ''QC-2 Hardware Organization'', ''' Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, Oct. 2009, Ref. 5ABA-TR09.''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/research/projects/QueueCore/doc/qc2_data_path_v2_08102009.pdf]])
- A. Ben Abdallah, ''QueueCore - The Strong Wave!'', '''Technical report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, May 2007, Ref. 4ABA-TR07.''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/research/projects/QueueCore/doc/QC2_presentationMay07.pdf]])
-A. Ben Abdallah,''Introduction to Verilog HDL'', '''Technical Report, Parallel/Distributed Systems Laboratory, Graduate School of Information Systems, National University of Electro-communications, May 2004, Ref. 3ABA-TR04. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/publications/treport/verilog_tutorial_v2.pdf]])
-A. Ben Abdallah,''QueueCore Instruction Set Architecture'', '''Technical Report, Parallel/Distributed Systems Laboratory, Graduate School of Information Systems, National University of Electro-communications, January 2003, Ref. 2ABA-TR03.''' [&ref(pdf-download.gif,,40%); [[(PDF>http://web-ext.u-aizu.ac.jp/~benab/research/projects/QueueCore/doc/QC2isa.pdf]])
-A. Ben Abdallah, ''QC-1 Processing Stages Algorithms'', '''Technical Report, Parallel/Distributed Systems Laboratory, Graduate School of Information Systems, National University of Electro-communications, 2003, Ref. 1ABA-TR03. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/research/projects/QueueCore/doc/design_algorithms_details.pdf]])
*Posters [#se02567b]
- ''2012''
--[[Poster>http://aslweb.u-aizu.ac.jp/benlab/index.php?Posters-2012]]
- ''HIRN''
--[[English>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=hirn_poster_2011.pdf&refer=Internal%2FResources]]
--[[Japanese>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=hirn_poster_Japanese_2011.pdf&refer=Internal%2FResources]]
---[[Project Internal Site>http://aslweb.u-aizu.ac.jp/benlab/index.php?Internal%2FHIRN]]
- ''BANSMOM''
--[[English>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=eng_bansmom2011.pdf&refer=Internal%2FResources]]
--[[Japanese>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=ja_bansmom2011.pdf&refer=Internal%2FResources]]
--source and new version --> see project site
---[[Project Internal Site>http://aslweb.u-aizu.ac.jp/benlab/index.php?Internal%2FBANSMOM]]
-''OASIS''
--[[English>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=eng_OASIS2011.pdf&refer=Internal%2FResources]]
--[[Japanese>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=ja_OASIS2011.pdf&refer=Internal%2FResources]]
--Source and new versions ---> see project site
---[[Project Internal Site>http://aslweb.u-aizu.ac.jp/benlab/index.php?Internal%2FOASIS]]
-''QCompiler''
--[[English>http://web-ext.u-aizu.ac.jp/~benab/publications/posters/QueueCompiler_POSTER2009-e.pdf]]
- ''QCore''
--English: &ref(http://web-ext.u-aizu.ac.jp/~benab/publications/posters/Queue_Poster_2009_en.pdf,,PDF);
--Japanese: &ref(http://web-ext.u-aizu.ac.jp/~benab/publications/posters/Queue_Poster_2009_jp.pdf,,PDF);
---[[Project Site>http://aslweb.u-aizu.ac.jp/benlab/index.php?Internal%252QueueCore]]
-''SAA'' (Self-adaptive architecture)
--English:&ref(http://web-ext.u-aizu.ac.jp/~benab/publications/posters/m5131144_EnglishPanel_2009.pdf,,PDF);
--Japanese:&ref(http://web-ext.u-aizu.ac.jp/~benab/publications/posters/m5131144_JapanesePanel_2009.pdf,,PDF);
---[[Project Site>http://web-ext.u-aizu.ac.jp/~benab/research/projects/sea/]]
//-[[Research Introduction, June 2010>http://web-ext.u-aizu.ac.jp/~benab/research/benlab/benlab_research_introduction_june2010.pdf]]
*Tutorials [#g657f6cd]
-[[Designing with VDEC (Tokyo Univ.) VLSI Tools>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=VDEC.pdf&refer=Internal%2FResources]]
-Tutorial1: Designing with Alera CAD Tools -> See the top page..
- [[Designing with Quartus II - Extended Tutorial>http://web-ext.u-aizu.ac.jp/~benab/classes/tutorials/altera/quartusii/Quartus2_tutorial_v01.pdf]]
- [[FAQ page>http://aslweb.u-aizu.ac.jp/benlab/index.php?Internal%2FFAQ]]
-[[Introduction to Verilog>http://web-ext.u-aizu.ac.jp/~benab/publications/treport/verilog_tutorial_v2.pdf]]
-[[Introduction to Unix, Linux main command>http://web-ext.u-aizu.ac.jp/~benab/research/guidance/unix_intro.pdf]]
-[[All you need for Latex on Windows OS>latex]]
- [[Altera Design Tutorials>http://www.altera.com/education/univ/materials/comp_org/tutorials/unv-tutorials.html]]
*Papers [#x3bd0cf7]
** 2013 [#ob9ca5cf]
-A. Ben Ahmed, T. Ochi, Sh. Miura, A. Ben Abdallah, Run-Time Monitoring Mechanism for Efficient Design of Application-specific NoC Architectures in Multi/Manycore Era, The 6th International Workshop on Engineering Parallel and Multicore Systems (EPAMUS 2013), pp.257-262, Aug. 2012.
([[Slides>http://aslweb.u-aizu.ac.jp/~m5141153/Conferences/EPAMUS2013-slides.pdf]]), ([[Paper>http://aslweb.u-aizu.ac.jp/~m5141153/Conferences/EPAMUS2013.pdf]])
-Achraf.Ben Ahmed, Y.Kimezawa, A. Ben Abdallah, Hardware/Software Prototyping of Dependable Real-Time System for Elderly Health Monitoring, The 2013 International Conference on Machines Applications and Embedded Systems ''ICMAES'2013'' June. 2013. ([[Slides>http://aslweb.u-aizu.ac.jp/~m5151161/conference/2013/Tunisia/Tunisia_slides.ppt]]), ([[Paper>http://aslweb.u-aizu.ac.jp/~m5151161/conference/2013/Tunisia/Tunisia_pdf.pdf]])
** 2012 [#w3fa4a86]
-A. Ben Ahmed, K. Mori, A. Ben Abdallah, ONoC-SPL Customized Network-on-Chip (NoC) Architecture and Prototyping for Data-intensive Computation Applications, The 4th International Conference on Awareness Science and Technology (iCAST-2012), pp.257-262, Aug. 2012.
([[Slides>http://aslweb.u-aizu.ac.jp/~m5141153/Conferences/ICAST2012-slides.pdf]]), ([[Paper>http://aslweb.u-aizu.ac.jp/~m5141153/Conferences/ICAST2012.pdf]])
-A. Ben Ahmed, A. Ben Abdallah, LA-XYZ: Low Latency, High Throughput Look-Ahead Routing Algorithm for 3D Network-on-Chip (3D-NoC) Architecture, The IEEE 6th International Symposium on Embedded Multicore SoCs, pp. 167-174, Sep. 2012.
([[Slides>http://aslweb.u-aizu.ac.jp/~m5141153/Conferences/MCSoC2012-slides.pdf]]), ([[Paper>http://aslweb.u-aizu.ac.jp/~m5141153/Conferences/MCSoC2012.pdf]])
** 2010 [#k4240e17]
-A. Ben Ahmed, A. Ben Abdallah, K. Kuroda,Architecture and Design of Efficient 3D Network-on-Chip (3D NoC) for Custom Multicore SoC, IEEE Proc. of the 5th International Conference on Broadband, Wireless Computing, Communication and Applications (BWCCA-2010), pp.67-73, Nov. 2010. (best paper award)
([[Slides>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/BWCCA10/BWCCA10-Akram-slides.pdf]]), ([[Paper>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/BWCCA10/BWCCA10-Akram.pdf]])
-K. Mori, A. Esch, A. Ben Abdallah, K. Kuroda, Advanced Design Issues for OASIS Network-on-Chip Architecture, IEEE Proc. of the 5th International Conference on Broadband, Wireless Computing, Communication and Applications (BWCCA-2010),pp.74-79, Nov. 2010. ([[Slides>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/BWCCA10/BWCCA10-Mori-slides.pdf]]); ([[Paper>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/BWCCA10/BWCCA10-Mori.pdf]])
-A. Ben Abdallah, Y. Haga, K. Kuroda,An Efficient Algorithm and Embedded Multicore Implementation for ECG Analysis in Multi-lead Electrocardiogram Records, IEEE Proc. of the 39th he International Conference on Parallel Processing Workshop, San Diego, pp.99-103, Sept. 13-16, 2010. ([[Slides>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/ICPP2010/ICPPW10_slides.pdf]]); ([[Paper>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/ICPP2010/ICPPW10_manuscript.pdf]])
** 2009 [#jc636e78]
- FAN2009: [[Efficient Code Generation Algorithm for Natural Instruction Level Parallelism-aware Queue Architecture>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/FAN2009-4/fan09_Masuda.pdf]],The 19th Intelligent System Symposium (FAN 2009), pp.308-313, Sep. 2009.(Best Presentation Award). [[[PDF slides>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/FAN2009-4/FAN2009_Presen_Masuda.pdf]]],[[[PPT slides>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/FAN2009-4/Masuda_FAN2009_final.ppt]] ]
-FAN2009: [[PNoC: Design and Preliminary Evaluation of a Parameterizable NoC for MCSoC Generation and Design Space Exploration>http://aslweb.u-aizu.ac.jp/~s1140204/2009/RPS/FAN2009/s1140204_FAN2009.pdf]], The 19th Intelligent System Symposium (FAN 2009), pp.314-317, Sep.2009.
&ref(http://aslweb.u-aizu.ac.jp/~s1140204/2009/RPS/FAN2009/s1140204_FAN2009.ppt,,SLIDE);
-FAN2009: [[Design and Evaluation of a Complexity Effective Network-on-Chip Architecture on FPGA>http://aslweb.u-aizu.ac.jp/~s1140210/2009/FAN2009/s1140210_FAN2009.pdf]], The 19th Intelligent System Symposium (FAN 2009), pp.318-321, Sep. 2009.
&ref(http://aslweb.u-aizu.ac.jp/~s1140210/2009/FAN2009/s1140210_fan.pptx,,SLIDE);
-FAN2009: [[Embedded MCSoC Architecture and Period-Peak Detection (PPD) Algorithm for ECG Processing>http://www.u-aizu.ac.jp/~benab/publications/conferences/FAN2009-3/fan09_Haga.pdf]], The 19th Intelligent System Symposium (FAN 2009), pp.298-303, Sep. 2009.
[[Slides>http://www.u-aizu.ac.jp/~benab/publications/conferences/FAN2009-3/FAN2009_Presen_Haga.ppt]]
-PARTHENON2009: [[設計空間探索とMCSoCの生成に適しているparameterizable NoC (PNoC)のハードウェア設計と事前評価>http://aslweb.u-aizu.ac.jp/~s1140204/2009/RPS/PARTHENON2009/s1140204_PARTHENON2009.pdf]], 第34回パルテノン研究会, pp.105-108. Aug. 2009.
&ref(http://aslweb.u-aizu.ac.jp/~s1140204/2009/RPS/PARTHENON2009/s1140204_PARTHENON2009.ppt,,SLIDE);
** 2008 [#s7274233]
- SEUC2008:[[Single Instruction Dual-Execution Model Processor Architecture>http://aslweb.u-aizu.ac.jp/~s1130205/Conference/EUC/m5131144_EUC_article.pdf]], IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, Shanghai, pp.30-36, Dec. 2008
&ref(http://aslweb.u-aizu.ac.jp/~s1130205/Conference/EUC/m5131144_EUC_presen.ppt,,SLIDE);
-UEC2008:Advanced Optimization and Design Issues of a 32-bit Embedded Processor Based on Produced Order Queue Computation Model, IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, Shanghai, pp.16-22, Dec. 2008
-JPDC2008: The QC-2 Parallel Queue Processor Architecture, Journal of Parallel and Distributed Computing, Vol. 68, No. 2, (2008), pp. 235– 245. [[PAPER>http://www.u-aizu.ac.jp/~benab/publications/journals/jpdc08/ad00c112a6a7dfa5312a0cfbf4f91e9e.pdf]],
** Before 2008 [#e2da24e1]
-Modular Design Structure and High-Level Prototyping for Novel Embedded Processor Core", International Conference on Embedded and Ubiquitous Computing (EUC2005), LNCS Vol.3824, pp. 340-349, 2005 [[PAPER>http://www.u-aizu.ac.jp/~benab/publications/conferences/EUC2005/EUC05-123.pdf]],[[SLIDES>http://www.u-aizu.ac.jp/~benab/publications/conferences/EUC2005/euc2005_presentation.pdf]]
-[[Queue Processor for Novel Queue Computing Paradigm Based on Produced Order Scheme>http://www2.computer.org/portal/web/csdl/abs/proceedings/hpcasia/2004/2138/00/21380169abs.htm]], IEEE computer Society, Proc. of the The 7th High Perfomance Computing and Grid in Asia Pacific Region (HPCAsia2004), pp. 169-177, July 2004.
-[[並列キュープロセッサの基本設計デザインガイア2002>http://www.u-aizu.ac.jp/~benab/publications/conferences/CPSY2002/PQP_ORG_IDEA.pdf]], 電子情報通信学会技術研究報告 IEICE CPSY2002-60, pp. 55-60, Nov., 2002.
...more (see also [[publication list>http://aslweb.u-aizu.ac.jp/benlab/index.php?Publications]])
*Book list [#v526d9e6]
Note: There is a notebook available at the Bookshelf.
If you want to borrow a book, please write your name and the borrowing/returning date in the notebook. Contact Mr. Achraf for more information.
|Number|Title|Author|borrower|
|1|Networks-on-Chips: Theory and Practice|Fayez Gebali, Haytham Elmiligi, and Mohamed Watheq El-Kharashi||
|2|Networks on Chips: Technology and Tools|Giovanni De Micheli, Luca Benini||
|3|Principles and Practices of Interconnection Networks|William James Dally and Brian Patrick Towles|Ben March.21,2012|
|4|Low-Power NoC for High-Performance SoC Design|Hoi-jun Yoo、Kangmin Lee、 Jun Kyoung Kim||
|5|Networks on Chip: Topology, Switching, Routing|Maksat Atagoziyev||
|6|MULTICORE SYSTEMS ON CHIPS 2007|Ben Abdalah Abderazek|Ben March.21,2012|
|7|Modern VLSI Design IP_BASED DESIGN 4th| Wayne Wolf| |
|8|On-Chip Communication Architectures| SUDEEP PASRICHA|Ben. Jan. 26, 2010 |
|9|Networks On Chips: Theory and Practice |Feyez G./Haytham E./Mohamed W. | Akram. April 12, 2010|
|10|Modern VLSI Design: IP-Based Design| Wayne Wolf| Akram. April 12,2010 |
|11| The Verilog PLI Handbook | Stuart Suntherland and Sutherland HDL, Inc. | Ben March.21,2012|
|12| Modern Processor design- Fundamentals of superscalar processors | Shen-Lipasti | Akram. June 18,2010 |
|13|CMOS: Circuit Design, Layout and simulation- 3rd edi.|R.J. Baker|Ben. April 06, 2011|
|14|Digital VLSI Chip Design with Cadence and Synopsys CAD Tools|E. Brunvand|Ben. April 06, 2011|
|15|CMOS VLSI DESIGN: A circuits and systems perspective- 4th edi.|Neil H.E. West/D.M. Harris|Ben. April 06, 2011|
|16|Computer Organization And Design 3rd edition |David A. Patterson/ John L. Hennessey|Ben. May 27, 2011|
|17|Fundamentals of Digital Logic with Verilog Design Second edition|Stephen Brown/ Zvonko Vranesic|Ben. October 25, 2013|
|17|Advanced FPGA Design |Steve Kilts|Akram. May 24, 2011|
|18|Computer Organization And Design 2nd edition |David A. Patterson/ John L. Hennessey|Achraf. May 27, 2011|
|19|Multicore Systems On-Chips:Pratical Software/Hardware Design|Abderazek Ben Abdallah|Achraf. May 27, 2011|
|20|Real Chip Design and Verification |Ben Cohen|Ben. October 25, 2013|
|21|Introduction To JAVA Programming Seventh Edition|Y.Daniel Liang|Achraf. July 07, 2011|
|22|Professional JAVA User Interfaces|Mauro Marinilli|Ben. October 25, 2013|
|23|Real-Time JAVA Programming With Java RTS|Eric J.Bruno ,Greg Bollella|Achraf. July 23, 2011|
|24|A Retargetable C Compiler:Design And Implementation |Christopher Fraser, Davis Hanson|Achraf. July 23, 2011|
|25|Architecture Des Ordinateurs (fr) |David A. Patterson/ John L. Hennessey|Achraf. August 11, 2011|
|26|Parallel Programming with Microsoft Visula Studio 2010|Donis Marshall|Ben. Oct 3, 2011|
|27|Leakage in Nanometer CMOS Technologies|Siva G. Narendra, Anantha P. Chandrakasan |Ben. Dec 13, 2011|
|28|Power Management of Digital Circuits in Deep Sub-Micron CMOS Technologies|Stephan Henzler|Ben. Dec 13, 2011|
|29|Memory Systems: Cache, DRAM, Disk|B.Jacob, S.W. Ng, D.T. Wang|Ben. Jan 25, 2012|
|30|Chip Multiprocessor Architecture|K. Olukotun, L. Hammond, J. Laudon|Ben. Jan 25, 2012|
|31|Processor Microarchitecture|A. Gonzalez, F. Latorre, G. Magklis|Ben. Jan 25, 2012|
|32|MULTI-CORE EMBEDDED SYSTEMS|Georgios Kornaros|Ben Feb 3,2012|
|33|Computer Systems A PROGRAMMER'S PRESPECTIVE|E.Bryant ,R.David|Achraf Feb 6,2012|
|34|Compact Wireless and Wired Sensing Systems|Mohamed Ilyas,Imad Mahgoub|Ben. October 25, 2013|
|35|Digital VLSI Chip Design with Cadence and Synopsys CAD Tools|E. Brunvand|Akram June,2012|
|36|Foundation For Broadband Network|ATM|Achraf May,2012|
|37|Networking and Internet-working with Micro-controllers |Fred Eady|Achraf May,2012|
|38|Inter networking with TCP/IP|Douglas E.comer,David L.Stevens|Achraf May,2011|
|39|Three dimensional Integrated circuit design (Systems on silicon) |Vasilis F. Pavlidis, Eby G. Friedman|Ben June 4th,201|
|40|Three dimensional Integrated circuit design: EDA, design and Microarchitecture |Y. Xie, J. Cong, S. Sapatnekar|Ben June 4th,2012|
|41|3D IC stacking technology |B. Wu, A. Kumar, S. Ramaswami|Akram June 4th, 2012|
|42|µC/OS-II + Renesas RX62N|Jan I. ,Fabiano Kovalski|Ben. June 29th, 2012|
|43|Embedded Systems, An introduction Using the Renesas Microcontroller |James M. Conrad|Ben. July 1st, 2012|
|44|Creating Fast, Responsive and Energy Efficient Embedded Systems|Alexandar G. Dean|Ben. July 1st, 2012|
|45|iOS Programming: The Big Nerd Ranch Guide |Richard Wentk|Achraf. July 30th, 2012|
|46|X Code |Joe conway & AAron Hillegass|Achraf. July 30th, 2012|
|47|Embedded ethernet and internet complete |Jan Axleson|Achraf. November 29th, 2012|
|48|Introduction to Parallel computing/ Second edition |A. Grama, A. Gupta, G. Karypis, V. Kumar|Akram November 29th, 2012|
|49|Memory Systems Cache,DRAM,Disk|Bruce jacob,Spencer W.Ng , David T.Wang|Ben December 13th,2012|
|50|Programming in Objective-C (5th Edition)|Stephen G. Kochan|Ben December 27th,2012|
|51|The complete guide to ECGs (3rd Edition)|S. C. Hammill, M. S. Freed|Ben February 19th,2013|
|52|Using OpenMP: Portable Shared Memory Parallel Programming|B. Chapman G. Jost, R. Vander Pas|Ben February 19th,2013|
|53|Computer Organization And Architecture (8th edition) |W. Stallings|Ben February 19th,2013|
|54|Biomedical CMOS ICs |H. J. Yoo, C Van Hoof|Ben February 19th,2013|
|55|JPEG 2000|S.Taubman,Michael Marcellin|Akram March 21,2012|
|56|Body Sensor Network |Guang-Zhong Yang|Ben. October 25, 2013|
|57|Distributed and cloud computing |Kai Hwang|Ben. October 25, 2013|
|58|Bio-Medical CMOS ICs |Hoi-Jun Yoo, Chris van Hoof|Ben. October 25, 2013|
|59|The Linux Programming Interface|Michael Kerrisk|Achraf February 26th,2013|
|60|Programming with Posix threads |David R. Butenhof|Achraf February 26th,2013|
|61|Multicore Application Programming,For Windows Linux and Oracle Solaris |Darryl Gove|Achraf March 18th,2013|
|62|The Verilog PLI Handbook (2nd edition)|Stuart. Sutherland|Akram April 24th,2013|
|63|Real-Time Systems and Programming Languages (4th edition)|A. Burns, A. Wellings|Akram May 22nd,2013|
|64|Bluetooth Low Energy: The Developer's Handbook|Robin Heydon|Ben. October 25, 2013|
|65|Data-Intensive Computing: Architectures, Algorithms and Applications|Ian Gorton , Deborah K.Gracio|Ben June 3,2013|
|66|Architectures of Optical Interconnection Networks for High Performance Computing|Assaf Shacham|Achraf July 3,2013|
|67|Integrated Optical Interconnect Architectures for Embedded Systems| Ian O'Connor|Achraf August 22,2013|
|68|High-Speed Photonics Interconnects|L.Chrostowski ,K.Iniewski|Achraf August 22,2013|
|69| Photonic Network-on-Chip Design (2 copies)|K.Bergman,L.Carloni, A.Biberman|Ben,Achraf October 8,2013|
|70|Leakage in Nanometer CMOS Technologies|S. G. Narendra and A. Chandrakasan|Akram October 29,2013|
|71|Speculative Everything: Design, Fiction, and Social Dreaming|A. Dunne and F. Raby|Ben May 30, 2014|
|72|Optical Code Division Multiple Access: A Practical Perspective|K. Kitayama|Ben May 30, 2014|
|72|Digital VLSI Chip Design with Cadence and Synopsys CAD Tools|E. Brunvand|Ben June 30, 2014|
*Available Software List (BENLAB Internal usage only)[#gbe58ecb]
- Visual Studio 2008, English
- Windows 7 , ULTIMATE, 32-bit, English
- Windows Vista, ULTIMATE, 32-bit, English
- Windows 7 ULTIMATE, 64-bit, English
- Norton Anti-virus 2011 (Japanese version). Number of licenses: 10. Renew date: End of June 2012.
- SmartDraw 2012, English, Installed on 2 Machines.
*Useful IEEE Online Courses [#g4145cbe]
-[[Useful IEEE Online Courses>http://aslweb.u-aizu.ac.jp/benlab/index.php?ieee-elearning]]
*FPGA [#v526d9e6]
|''User''|''FPGA''|''Borrowing date''|
|Achraf|DE2 board|April 13, 2012|
*Notebooks, PC (Purchased by BENLAB only) [#k114eb28]
|''User''|''Notebook/PC''|''Borrowing date''|''Upgrade''|
|Achraf|iMAC 27-inch|July 1st, 2012| 2x2gb ddr3 1333mhz memory |
|Achraf|Toshiba dynabook T551/58BB|June,2011| 500GB Hard disc|
|Akram|Fujitsu, LIFEBOOK NH77/ED|March 22, 2012| |
|Ochi|Fujitsu, DTS UltraPc II|April 27, 2012| |
|Akram| 1TB External Hard disc |October 4, 2013| |
|Achraf| 1TB External Hard disc |October 4, 2013| |
*Verilog-HDL source code [#e8166ee3]
-[[Internal/Verilog]]
終了行:
CENTER:SIZE(50){COLOR(green){Internal Research Resources}}
''Contents:''
#Contents
*[[Theses>http://aslweb.u-aizu.ac.jp/aslwiki/index.php?Theses]] [#y31f1ca1]
-Y. Kimezawa,''Towards the Design of Dependable Real-Time System for Remote Health Monitoring of Elderly People'', Master's Thesis, Graduate School of Computer Science and Engineering, The University of Aizu, Feb. 2013. ([[''Slides''>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/Kimesawa-MS-12/m5151117_MS_thesis_slides.pdf]]); ([[''Thesis''>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/Kimesawa-MS-12/m5151117_MS_thesis.pdf]]), (Technical Report),
-Achraf Ben Ahmed, ''Interactive Real-time Interface for Smart Remote Health Monitoring and Analysis'', Master's Thesis, Graduate School of Computer Science and Engineering, The University of Aizu, Feb. 2013 ([[''Slides''>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/Achraf-MS-12/m5151161_MS_thesis_slides.pdf]]);([[''Thesis''>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/Achraf-MS-12/m5151161_2012_MS_thesis.pdf]]); (Technical Report)
-Takayuki Ochi, ''A Quantitative Performance Study of Shared Memory Multicore Systems'', Bachelor Thesis, School of Computer Science and Engineering, The University of Aizu, Feb. 2013 ([[''Slides''>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/Ouchi-BS-12/s1160053_GT2012_slides.pdf]]); ([[''Thesis''>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=s1160053_GT_thesis.dvi&refer=Internal%2FResources]]);(Technical Report)
-Shuu Endou, ''Hardware Prototyping and Evaluation of Distributed Routing Core Network-Interface for OASIS NoC Architecture '', Bachelor Thesis, School of Computer Science and Engineering, The University of Aizu, Feb. 2013 ([[''Slides''>http://web-ext.u-aizu.ac.jp/~benab/publications/theses/Endou-BS-12/s1170180_GT2012_slides.pdf]]); (Thesis) ; (Technical Report)
-Shohei Miura, [[Efficient Design Method for NoC using Monitoring Mechanism: Parameterziable Network-on-Chip>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Miura-MS-11/m5141118_2011_MS_thesis.pdf]] Master's Thesis, The University of Aizu, Feb. 2012. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Miura-MS-11/m5141118_2011_MS_slides.ppt]], [[technical report>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Miura-MS-11/m5141118_2011_MS_tr.pdf]]
-Kenichi Mori, [[OASIS Network-on-Chip Prototyping on FPGA>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Mori-MS-11/m5141120_2011_MS_thesis.pdf]], Master's Thesis, The University of Aizu, Feb. 2012.[[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Mori-MS-11/m5141120_2011_MS_slides.pptx]], [[technical report>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Mori-MS-11/m5141120_2011_MS_tr.pdf]]
-Ben Ahmed Akram, [[On the Design of a 3D Network-on-Chip for Many-core SoC >http://www.u-aizu.ac.jp/~benab/publications/theses/Akram-MS-11/m5141153_2011_MS_thesis.pdf]], Master's Thesis, The University of Aizu, Feb. 2012. [[slides>http://www.u-aizu.ac.jp/~benab/publications/theses/Akram-MS-11//m51411532011_MS_thesis_slides.pdf]]
-Ryuya Okada, [[Architecture and Design of Core Network Interface for Distributed Routing in OASIS NoC>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Okada-BS-11/s1160048_GT2011.pdf]], Graduation Thesis, The University of Aizu, Feb. 2012. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Okada-BS-11/s1160048_GT2011.ppt]]
-Tomotaka Kasahara, [[Design and Implementation of a Multicore Systems>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Kasahara-BS-11/s1160056_GT2011.pdf]], Graduation Thesis, The University of Aizu, Feb. 2012. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Kasahara-BS-11/s1160056_GT2011.ppt]]
-Hiroki Hoshino, [[Development of Parallel Queue Processor Architecture and its Integrated Development Environment>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Hoshino-MS-10/m5131139_2010_MS_thesis.pdf]], Master's Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Hoshino-MS-10/m5131139_2010_MasterThesis.ppt]]
-Taichi Maekawa, [[Design and Evaluation of Dual Mode Processor Architecture>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Maekawa-MS-10/m5131144_Maekawa_MS_thesis.pdf]], Master's Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Maekawa-MS-10/m5131144_Maekawa_MS_presentation.ppt]]
-Masashi Masuda, [[Produced Order Queue Compiler Design>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Masuda-MS-10/m5131145_Masashi_MS_thesis.pdf]], Mater's Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Masuda-MS-10/m5131145_Masashi_MS_Presentation.pdf]]
-Takahiro Uesaka, [[OASIS NoC Topology Optimization with ShortPath Link>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Uesaka-BS-10/s1150030.pdf]],Graduation Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Uesaka-BS-10/s1150030_GT2010.ppt]]
-Shunichi Kato, [[Shared Memory MultiQueueCore Processor Design>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Kato-BS-10/graduation_thesis_final_edition.pdf]],Graduation Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Kato-BS-10/s1150059_GT2010.ppt]]
-Yumiko Kimezawa, [[Multicore SoC Architecture for Realtime Data Intensive ECG Processing>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Kimezawa-BS-10/s1150072_GT2010_Feb122011.pdf]], Graduation Thesis, The University of Aizu, Feb. 2011. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Kimezawa-BS-10/s1150072_GT2010_Feb122011.ppt]]
-Yuuki Omoto: [["Development Environment for Single Chip Computer Intended for Queue Computing Education">>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Omoto-BS-09/s1100049_GT2009.pdf]],
[[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Omoto-BS-09/GT2009_Yuuki_Omoto_final.ppt]]
- Haga Yasuyoshi: [["Architecture and Design of Application Specific Multicore SoC">http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Haga-BS-09/gt2009.pdf]] , [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Haga-BS-09/GT2009_YasuyoshiHaga_final.pdf]]
- Reo Honjoya.[["Development of User Friendly Assembler for Queue Computers">>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Reo-BS-09/thesis.pdf]], [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Reo-BS-09/GT2009_ReoHonjoya_final.ppt]]
-Mori Kenichi. [["Optimizations Techniques and FPGA Prototyping of OASIS Network-on-Chip">http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Mori-BS-09/thesis.pdf]] , [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Mori-BS-09/GT2009_KenichiMori_final.ppt]]
-Miura Shohei: [["Architecture and Design of Parameterizable Network-on-Chip">http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Miura-BS-09/thesis.pdf]] , [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Miura-BS-09/GT2009_ShoheiMiura_final.ppt]]
-Masashi Masuda, [[Graph Transformation Methods and Theoretical Performance Evaluation of Queue Computation Models >http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Masuda-BS-08/masuda2008.pdf]], Masashi Masuda, The Univ. of Aizu, Feb. 12, 2009. [[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Masuda-BS-08/masuda-pres-2008.pdf]]
-Hiroki Hoshino, [[Advanced Hardware Optimization Algorithms for High Performance Queue Processor Architecture>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Hoshino-BS-08/hoshino2008.pdf]], Hiroki Hoshino, The Univ. of Aizu, Feb. 12, 2009.[[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Hoshino-BS-08/hoshino-pres-2008.pdf]]
-Taichi Maekawa, [[Research on Hardware Design of Dual-Mode Processor Architecture>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Maekawa-BS-08/maekawa2008.pdf]], Taichi Maekawa, The Univ. of Aizu, Feb. 12, 2009.
[[slides>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Maekawa-BS-08/maekwawa_GT2008_presentation.pdf]]
*Technical Reports [#ibc6e84b]
- A. Ben Abdallah, Research on On-chip network for Multi/Many-core Systems, CED, UoA, Feb. 15, 2012. &ref(pdf-download.gif,,40%); [[(PDf)>http://webfs-int.u-aizu.ac.jp/~benab/publications/treport/CED-UoA-02152012.pdf]]
- Ryuya Okada, A. Ben Abdallah, ''Architecture and Design of Core Network Interface for Distributed Routing in OASIS NoC'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, March 2012, Ref. 16RO-TR12.''' [[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/publications/treport/RyuyaOkada-TR2011.pdf]])
-Kenichi Mori, A. Ben Abdallah, ''OASIS Network-on-Chip Prototyping on FPGA'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, March 2012, Ref. 15KM-TR12.''' [[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/publications/treport/m5141120_2011_MS_tr.pdf]])
-Akram Ben Ahmed, A. Ben Abdallah, ''On the Design of 3D Network-on-Chip'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, March 2012, Ref. 14AKA-TR12.'''[[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/publications/treport/tr_akram.pdf]])
- Y. Kimezawa, A. Ben Abdallah, ''BANSMOM System Organization'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, Feb. 2011, Ref. 13YK-TR11. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/research/projects/bansmom/doc/tr/bansmom_technical_report_022011.pdf]])
-Achraf Ben ahmed, A. Ben Abdallah, ''Running BANSMOM System'',
'''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, July 2011, Ref. 12ACA-TR11.''' [[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/research/projects/bansmom/doc/BANSMOM_DEMO.pdf]])
-S. Miura, A. Ben Abdallah, ''Efficient Design Method for NoC using Monitoring Mechanism: Parameterziable Network-on-Chip'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, March 2012, Ref. 11SM-TR12. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/publications/theses/Miura-MS-11/m5141118_2011_MS_tr.pdf]])
-T. Uesaka, A. Ben Abdallah, ''OASIS NoC Topology Optimization with Short-Path Link'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, March 2011, Ref. 10TU-TR10. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/publications/treport/OASIS-SPL_Technical_report_2010.pdf]])
-K. Mori, A. Ben Abdallah, ''OASIS NoC Architecture Design in Verilog HDL'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, June 2010, Ref. 9MK-TR10. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/publications/treport/oasis-noc-design-2010.pdf]])
-A. Ben Abdallah, ''Practical Design Issues of Network-on-Chip'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, Jan. 2010, Ref. 8ABA-TR10. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://webfs-int.u-aizu.ac.jp/~benab/publications/invited/NoC-Lecture1_2-KUST.pdf]])
-H. Hoshino, A. Ben Abdallah, ''QSoC - Queue System on Chip on FPGA'', Technical Report, '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, January 2010, Ref. 7HH-TR10.''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/research/projects/QSoC/doc/QSoC32_specification.pdf]])
- K. Uesaka, A. Ben Abdallah, ''Qasm - User Friendly Assembler for Queue Computers'', '''Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, The University of Aizu, 2010, Ref. 6KU-TR10.''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/research/projects/Qasm/Qasm_technical_report_2010.pdf]])
-H. Hoshino, A. Ben Abdallah, ''QC-2 Hardware Organization'', ''' Technical Report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, Oct. 2009, Ref. 5ABA-TR09.''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/research/projects/QueueCore/doc/qc2_data_path_v2_08102009.pdf]])
- A. Ben Abdallah, ''QueueCore - The Strong Wave!'', '''Technical report, Adaptive System Laboratory, School of Computer Science and Engineering, The University of Aizu, May 2007, Ref. 4ABA-TR07.''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/research/projects/QueueCore/doc/QC2_presentationMay07.pdf]])
-A. Ben Abdallah,''Introduction to Verilog HDL'', '''Technical Report, Parallel/Distributed Systems Laboratory, Graduate School of Information Systems, National University of Electro-communications, May 2004, Ref. 3ABA-TR04. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/publications/treport/verilog_tutorial_v2.pdf]])
-A. Ben Abdallah,''QueueCore Instruction Set Architecture'', '''Technical Report, Parallel/Distributed Systems Laboratory, Graduate School of Information Systems, National University of Electro-communications, January 2003, Ref. 2ABA-TR03.''' [&ref(pdf-download.gif,,40%); [[(PDF>http://web-ext.u-aizu.ac.jp/~benab/research/projects/QueueCore/doc/QC2isa.pdf]])
-A. Ben Abdallah, ''QC-1 Processing Stages Algorithms'', '''Technical Report, Parallel/Distributed Systems Laboratory, Graduate School of Information Systems, National University of Electro-communications, 2003, Ref. 1ABA-TR03. ''' [[&ref(pdf-download.gif,,40%); (PDF>http://www.u-aizu.ac.jp/~benab/research/projects/QueueCore/doc/design_algorithms_details.pdf]])
*Posters [#se02567b]
- ''2012''
--[[Poster>http://aslweb.u-aizu.ac.jp/benlab/index.php?Posters-2012]]
- ''HIRN''
--[[English>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=hirn_poster_2011.pdf&refer=Internal%2FResources]]
--[[Japanese>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=hirn_poster_Japanese_2011.pdf&refer=Internal%2FResources]]
---[[Project Internal Site>http://aslweb.u-aizu.ac.jp/benlab/index.php?Internal%2FHIRN]]
- ''BANSMOM''
--[[English>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=eng_bansmom2011.pdf&refer=Internal%2FResources]]
--[[Japanese>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=ja_bansmom2011.pdf&refer=Internal%2FResources]]
--source and new version --> see project site
---[[Project Internal Site>http://aslweb.u-aizu.ac.jp/benlab/index.php?Internal%2FBANSMOM]]
-''OASIS''
--[[English>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=eng_OASIS2011.pdf&refer=Internal%2FResources]]
--[[Japanese>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=ja_OASIS2011.pdf&refer=Internal%2FResources]]
--Source and new versions ---> see project site
---[[Project Internal Site>http://aslweb.u-aizu.ac.jp/benlab/index.php?Internal%2FOASIS]]
-''QCompiler''
--[[English>http://web-ext.u-aizu.ac.jp/~benab/publications/posters/QueueCompiler_POSTER2009-e.pdf]]
- ''QCore''
--English: &ref(http://web-ext.u-aizu.ac.jp/~benab/publications/posters/Queue_Poster_2009_en.pdf,,PDF);
--Japanese: &ref(http://web-ext.u-aizu.ac.jp/~benab/publications/posters/Queue_Poster_2009_jp.pdf,,PDF);
---[[Project Site>http://aslweb.u-aizu.ac.jp/benlab/index.php?Internal%252QueueCore]]
-''SAA'' (Self-adaptive architecture)
--English:&ref(http://web-ext.u-aizu.ac.jp/~benab/publications/posters/m5131144_EnglishPanel_2009.pdf,,PDF);
--Japanese:&ref(http://web-ext.u-aizu.ac.jp/~benab/publications/posters/m5131144_JapanesePanel_2009.pdf,,PDF);
---[[Project Site>http://web-ext.u-aizu.ac.jp/~benab/research/projects/sea/]]
//-[[Research Introduction, June 2010>http://web-ext.u-aizu.ac.jp/~benab/research/benlab/benlab_research_introduction_june2010.pdf]]
*Tutorials [#g657f6cd]
-[[Designing with VDEC (Tokyo Univ.) VLSI Tools>http://aslweb.u-aizu.ac.jp/benlab/index.php?plugin=attach&pcmd=open&file=VDEC.pdf&refer=Internal%2FResources]]
-Tutorial1: Designing with Alera CAD Tools -> See the top page..
- [[Designing with Quartus II - Extended Tutorial>http://web-ext.u-aizu.ac.jp/~benab/classes/tutorials/altera/quartusii/Quartus2_tutorial_v01.pdf]]
- [[FAQ page>http://aslweb.u-aizu.ac.jp/benlab/index.php?Internal%2FFAQ]]
-[[Introduction to Verilog>http://web-ext.u-aizu.ac.jp/~benab/publications/treport/verilog_tutorial_v2.pdf]]
-[[Introduction to Unix, Linux main command>http://web-ext.u-aizu.ac.jp/~benab/research/guidance/unix_intro.pdf]]
-[[All you need for Latex on Windows OS>latex]]
- [[Altera Design Tutorials>http://www.altera.com/education/univ/materials/comp_org/tutorials/unv-tutorials.html]]
*Papers [#x3bd0cf7]
** 2013 [#ob9ca5cf]
-A. Ben Ahmed, T. Ochi, Sh. Miura, A. Ben Abdallah, Run-Time Monitoring Mechanism for Efficient Design of Application-specific NoC Architectures in Multi/Manycore Era, The 6th International Workshop on Engineering Parallel and Multicore Systems (EPAMUS 2013), pp.257-262, Aug. 2012.
([[Slides>http://aslweb.u-aizu.ac.jp/~m5141153/Conferences/EPAMUS2013-slides.pdf]]), ([[Paper>http://aslweb.u-aizu.ac.jp/~m5141153/Conferences/EPAMUS2013.pdf]])
-Achraf.Ben Ahmed, Y.Kimezawa, A. Ben Abdallah, Hardware/Software Prototyping of Dependable Real-Time System for Elderly Health Monitoring, The 2013 International Conference on Machines Applications and Embedded Systems ''ICMAES'2013'' June. 2013. ([[Slides>http://aslweb.u-aizu.ac.jp/~m5151161/conference/2013/Tunisia/Tunisia_slides.ppt]]), ([[Paper>http://aslweb.u-aizu.ac.jp/~m5151161/conference/2013/Tunisia/Tunisia_pdf.pdf]])
** 2012 [#w3fa4a86]
-A. Ben Ahmed, K. Mori, A. Ben Abdallah, ONoC-SPL Customized Network-on-Chip (NoC) Architecture and Prototyping for Data-intensive Computation Applications, The 4th International Conference on Awareness Science and Technology (iCAST-2012), pp.257-262, Aug. 2012.
([[Slides>http://aslweb.u-aizu.ac.jp/~m5141153/Conferences/ICAST2012-slides.pdf]]), ([[Paper>http://aslweb.u-aizu.ac.jp/~m5141153/Conferences/ICAST2012.pdf]])
-A. Ben Ahmed, A. Ben Abdallah, LA-XYZ: Low Latency, High Throughput Look-Ahead Routing Algorithm for 3D Network-on-Chip (3D-NoC) Architecture, The IEEE 6th International Symposium on Embedded Multicore SoCs, pp. 167-174, Sep. 2012.
([[Slides>http://aslweb.u-aizu.ac.jp/~m5141153/Conferences/MCSoC2012-slides.pdf]]), ([[Paper>http://aslweb.u-aizu.ac.jp/~m5141153/Conferences/MCSoC2012.pdf]])
** 2010 [#k4240e17]
-A. Ben Ahmed, A. Ben Abdallah, K. Kuroda,Architecture and Design of Efficient 3D Network-on-Chip (3D NoC) for Custom Multicore SoC, IEEE Proc. of the 5th International Conference on Broadband, Wireless Computing, Communication and Applications (BWCCA-2010), pp.67-73, Nov. 2010. (best paper award)
([[Slides>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/BWCCA10/BWCCA10-Akram-slides.pdf]]), ([[Paper>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/BWCCA10/BWCCA10-Akram.pdf]])
-K. Mori, A. Esch, A. Ben Abdallah, K. Kuroda, Advanced Design Issues for OASIS Network-on-Chip Architecture, IEEE Proc. of the 5th International Conference on Broadband, Wireless Computing, Communication and Applications (BWCCA-2010),pp.74-79, Nov. 2010. ([[Slides>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/BWCCA10/BWCCA10-Mori-slides.pdf]]); ([[Paper>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/BWCCA10/BWCCA10-Mori.pdf]])
-A. Ben Abdallah, Y. Haga, K. Kuroda,An Efficient Algorithm and Embedded Multicore Implementation for ECG Analysis in Multi-lead Electrocardiogram Records, IEEE Proc. of the 39th he International Conference on Parallel Processing Workshop, San Diego, pp.99-103, Sept. 13-16, 2010. ([[Slides>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/ICPP2010/ICPPW10_slides.pdf]]); ([[Paper>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/ICPP2010/ICPPW10_manuscript.pdf]])
** 2009 [#jc636e78]
- FAN2009: [[Efficient Code Generation Algorithm for Natural Instruction Level Parallelism-aware Queue Architecture>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/FAN2009-4/fan09_Masuda.pdf]],The 19th Intelligent System Symposium (FAN 2009), pp.308-313, Sep. 2009.(Best Presentation Award). [[[PDF slides>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/FAN2009-4/FAN2009_Presen_Masuda.pdf]]],[[[PPT slides>http://web-ext.u-aizu.ac.jp/~benab/publications/conferences/FAN2009-4/Masuda_FAN2009_final.ppt]] ]
-FAN2009: [[PNoC: Design and Preliminary Evaluation of a Parameterizable NoC for MCSoC Generation and Design Space Exploration>http://aslweb.u-aizu.ac.jp/~s1140204/2009/RPS/FAN2009/s1140204_FAN2009.pdf]], The 19th Intelligent System Symposium (FAN 2009), pp.314-317, Sep.2009.
&ref(http://aslweb.u-aizu.ac.jp/~s1140204/2009/RPS/FAN2009/s1140204_FAN2009.ppt,,SLIDE);
-FAN2009: [[Design and Evaluation of a Complexity Effective Network-on-Chip Architecture on FPGA>http://aslweb.u-aizu.ac.jp/~s1140210/2009/FAN2009/s1140210_FAN2009.pdf]], The 19th Intelligent System Symposium (FAN 2009), pp.318-321, Sep. 2009.
&ref(http://aslweb.u-aizu.ac.jp/~s1140210/2009/FAN2009/s1140210_fan.pptx,,SLIDE);
-FAN2009: [[Embedded MCSoC Architecture and Period-Peak Detection (PPD) Algorithm for ECG Processing>http://www.u-aizu.ac.jp/~benab/publications/conferences/FAN2009-3/fan09_Haga.pdf]], The 19th Intelligent System Symposium (FAN 2009), pp.298-303, Sep. 2009.
[[Slides>http://www.u-aizu.ac.jp/~benab/publications/conferences/FAN2009-3/FAN2009_Presen_Haga.ppt]]
-PARTHENON2009: [[設計空間探索とMCSoCの生成に適しているparameterizable NoC (PNoC)のハードウェア設計と事前評価>http://aslweb.u-aizu.ac.jp/~s1140204/2009/RPS/PARTHENON2009/s1140204_PARTHENON2009.pdf]], 第34回パルテノン研究会, pp.105-108. Aug. 2009.
&ref(http://aslweb.u-aizu.ac.jp/~s1140204/2009/RPS/PARTHENON2009/s1140204_PARTHENON2009.ppt,,SLIDE);
** 2008 [#s7274233]
- SEUC2008:[[Single Instruction Dual-Execution Model Processor Architecture>http://aslweb.u-aizu.ac.jp/~s1130205/Conference/EUC/m5131144_EUC_article.pdf]], IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, Shanghai, pp.30-36, Dec. 2008
&ref(http://aslweb.u-aizu.ac.jp/~s1130205/Conference/EUC/m5131144_EUC_presen.ppt,,SLIDE);
-UEC2008:Advanced Optimization and Design Issues of a 32-bit Embedded Processor Based on Produced Order Queue Computation Model, IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, Shanghai, pp.16-22, Dec. 2008
-JPDC2008: The QC-2 Parallel Queue Processor Architecture, Journal of Parallel and Distributed Computing, Vol. 68, No. 2, (2008), pp. 235– 245. [[PAPER>http://www.u-aizu.ac.jp/~benab/publications/journals/jpdc08/ad00c112a6a7dfa5312a0cfbf4f91e9e.pdf]],
** Before 2008 [#e2da24e1]
-Modular Design Structure and High-Level Prototyping for Novel Embedded Processor Core", International Conference on Embedded and Ubiquitous Computing (EUC2005), LNCS Vol.3824, pp. 340-349, 2005 [[PAPER>http://www.u-aizu.ac.jp/~benab/publications/conferences/EUC2005/EUC05-123.pdf]],[[SLIDES>http://www.u-aizu.ac.jp/~benab/publications/conferences/EUC2005/euc2005_presentation.pdf]]
-[[Queue Processor for Novel Queue Computing Paradigm Based on Produced Order Scheme>http://www2.computer.org/portal/web/csdl/abs/proceedings/hpcasia/2004/2138/00/21380169abs.htm]], IEEE computer Society, Proc. of the The 7th High Perfomance Computing and Grid in Asia Pacific Region (HPCAsia2004), pp. 169-177, July 2004.
-[[並列キュープロセッサの基本設計デザインガイア2002>http://www.u-aizu.ac.jp/~benab/publications/conferences/CPSY2002/PQP_ORG_IDEA.pdf]], 電子情報通信学会技術研究報告 IEICE CPSY2002-60, pp. 55-60, Nov., 2002.
...more (see also [[publication list>http://aslweb.u-aizu.ac.jp/benlab/index.php?Publications]])
*Book list [#v526d9e6]
Note: There is a notebook available at the Bookshelf.
If you want to borrow a book, please write your name and the borrowing/returning date in the notebook. Contact Mr. Achraf for more information.
|Number|Title|Author|borrower|
|1|Networks-on-Chips: Theory and Practice|Fayez Gebali, Haytham Elmiligi, and Mohamed Watheq El-Kharashi||
|2|Networks on Chips: Technology and Tools|Giovanni De Micheli, Luca Benini||
|3|Principles and Practices of Interconnection Networks|William James Dally and Brian Patrick Towles|Ben March.21,2012|
|4|Low-Power NoC for High-Performance SoC Design|Hoi-jun Yoo、Kangmin Lee、 Jun Kyoung Kim||
|5|Networks on Chip: Topology, Switching, Routing|Maksat Atagoziyev||
|6|MULTICORE SYSTEMS ON CHIPS 2007|Ben Abdalah Abderazek|Ben March.21,2012|
|7|Modern VLSI Design IP_BASED DESIGN 4th| Wayne Wolf| |
|8|On-Chip Communication Architectures| SUDEEP PASRICHA|Ben. Jan. 26, 2010 |
|9|Networks On Chips: Theory and Practice |Feyez G./Haytham E./Mohamed W. | Akram. April 12, 2010|
|10|Modern VLSI Design: IP-Based Design| Wayne Wolf| Akram. April 12,2010 |
|11| The Verilog PLI Handbook | Stuart Suntherland and Sutherland HDL, Inc. | Ben March.21,2012|
|12| Modern Processor design- Fundamentals of superscalar processors | Shen-Lipasti | Akram. June 18,2010 |
|13|CMOS: Circuit Design, Layout and simulation- 3rd edi.|R.J. Baker|Ben. April 06, 2011|
|14|Digital VLSI Chip Design with Cadence and Synopsys CAD Tools|E. Brunvand|Ben. April 06, 2011|
|15|CMOS VLSI DESIGN: A circuits and systems perspective- 4th edi.|Neil H.E. West/D.M. Harris|Ben. April 06, 2011|
|16|Computer Organization And Design 3rd edition |David A. Patterson/ John L. Hennessey|Ben. May 27, 2011|
|17|Fundamentals of Digital Logic with Verilog Design Second edition|Stephen Brown/ Zvonko Vranesic|Ben. October 25, 2013|
|17|Advanced FPGA Design |Steve Kilts|Akram. May 24, 2011|
|18|Computer Organization And Design 2nd edition |David A. Patterson/ John L. Hennessey|Achraf. May 27, 2011|
|19|Multicore Systems On-Chips:Pratical Software/Hardware Design|Abderazek Ben Abdallah|Achraf. May 27, 2011|
|20|Real Chip Design and Verification |Ben Cohen|Ben. October 25, 2013|
|21|Introduction To JAVA Programming Seventh Edition|Y.Daniel Liang|Achraf. July 07, 2011|
|22|Professional JAVA User Interfaces|Mauro Marinilli|Ben. October 25, 2013|
|23|Real-Time JAVA Programming With Java RTS|Eric J.Bruno ,Greg Bollella|Achraf. July 23, 2011|
|24|A Retargetable C Compiler:Design And Implementation |Christopher Fraser, Davis Hanson|Achraf. July 23, 2011|
|25|Architecture Des Ordinateurs (fr) |David A. Patterson/ John L. Hennessey|Achraf. August 11, 2011|
|26|Parallel Programming with Microsoft Visula Studio 2010|Donis Marshall|Ben. Oct 3, 2011|
|27|Leakage in Nanometer CMOS Technologies|Siva G. Narendra, Anantha P. Chandrakasan |Ben. Dec 13, 2011|
|28|Power Management of Digital Circuits in Deep Sub-Micron CMOS Technologies|Stephan Henzler|Ben. Dec 13, 2011|
|29|Memory Systems: Cache, DRAM, Disk|B.Jacob, S.W. Ng, D.T. Wang|Ben. Jan 25, 2012|
|30|Chip Multiprocessor Architecture|K. Olukotun, L. Hammond, J. Laudon|Ben. Jan 25, 2012|
|31|Processor Microarchitecture|A. Gonzalez, F. Latorre, G. Magklis|Ben. Jan 25, 2012|
|32|MULTI-CORE EMBEDDED SYSTEMS|Georgios Kornaros|Ben Feb 3,2012|
|33|Computer Systems A PROGRAMMER'S PRESPECTIVE|E.Bryant ,R.David|Achraf Feb 6,2012|
|34|Compact Wireless and Wired Sensing Systems|Mohamed Ilyas,Imad Mahgoub|Ben. October 25, 2013|
|35|Digital VLSI Chip Design with Cadence and Synopsys CAD Tools|E. Brunvand|Akram June,2012|
|36|Foundation For Broadband Network|ATM|Achraf May,2012|
|37|Networking and Internet-working with Micro-controllers |Fred Eady|Achraf May,2012|
|38|Inter networking with TCP/IP|Douglas E.comer,David L.Stevens|Achraf May,2011|
|39|Three dimensional Integrated circuit design (Systems on silicon) |Vasilis F. Pavlidis, Eby G. Friedman|Ben June 4th,201|
|40|Three dimensional Integrated circuit design: EDA, design and Microarchitecture |Y. Xie, J. Cong, S. Sapatnekar|Ben June 4th,2012|
|41|3D IC stacking technology |B. Wu, A. Kumar, S. Ramaswami|Akram June 4th, 2012|
|42|µC/OS-II + Renesas RX62N|Jan I. ,Fabiano Kovalski|Ben. June 29th, 2012|
|43|Embedded Systems, An introduction Using the Renesas Microcontroller |James M. Conrad|Ben. July 1st, 2012|
|44|Creating Fast, Responsive and Energy Efficient Embedded Systems|Alexandar G. Dean|Ben. July 1st, 2012|
|45|iOS Programming: The Big Nerd Ranch Guide |Richard Wentk|Achraf. July 30th, 2012|
|46|X Code |Joe conway & AAron Hillegass|Achraf. July 30th, 2012|
|47|Embedded ethernet and internet complete |Jan Axleson|Achraf. November 29th, 2012|
|48|Introduction to Parallel computing/ Second edition |A. Grama, A. Gupta, G. Karypis, V. Kumar|Akram November 29th, 2012|
|49|Memory Systems Cache,DRAM,Disk|Bruce jacob,Spencer W.Ng , David T.Wang|Ben December 13th,2012|
|50|Programming in Objective-C (5th Edition)|Stephen G. Kochan|Ben December 27th,2012|
|51|The complete guide to ECGs (3rd Edition)|S. C. Hammill, M. S. Freed|Ben February 19th,2013|
|52|Using OpenMP: Portable Shared Memory Parallel Programming|B. Chapman G. Jost, R. Vander Pas|Ben February 19th,2013|
|53|Computer Organization And Architecture (8th edition) |W. Stallings|Ben February 19th,2013|
|54|Biomedical CMOS ICs |H. J. Yoo, C Van Hoof|Ben February 19th,2013|
|55|JPEG 2000|S.Taubman,Michael Marcellin|Akram March 21,2012|
|56|Body Sensor Network |Guang-Zhong Yang|Ben. October 25, 2013|
|57|Distributed and cloud computing |Kai Hwang|Ben. October 25, 2013|
|58|Bio-Medical CMOS ICs |Hoi-Jun Yoo, Chris van Hoof|Ben. October 25, 2013|
|59|The Linux Programming Interface|Michael Kerrisk|Achraf February 26th,2013|
|60|Programming with Posix threads |David R. Butenhof|Achraf February 26th,2013|
|61|Multicore Application Programming,For Windows Linux and Oracle Solaris |Darryl Gove|Achraf March 18th,2013|
|62|The Verilog PLI Handbook (2nd edition)|Stuart. Sutherland|Akram April 24th,2013|
|63|Real-Time Systems and Programming Languages (4th edition)|A. Burns, A. Wellings|Akram May 22nd,2013|
|64|Bluetooth Low Energy: The Developer's Handbook|Robin Heydon|Ben. October 25, 2013|
|65|Data-Intensive Computing: Architectures, Algorithms and Applications|Ian Gorton , Deborah K.Gracio|Ben June 3,2013|
|66|Architectures of Optical Interconnection Networks for High Performance Computing|Assaf Shacham|Achraf July 3,2013|
|67|Integrated Optical Interconnect Architectures for Embedded Systems| Ian O'Connor|Achraf August 22,2013|
|68|High-Speed Photonics Interconnects|L.Chrostowski ,K.Iniewski|Achraf August 22,2013|
|69| Photonic Network-on-Chip Design (2 copies)|K.Bergman,L.Carloni, A.Biberman|Ben,Achraf October 8,2013|
|70|Leakage in Nanometer CMOS Technologies|S. G. Narendra and A. Chandrakasan|Akram October 29,2013|
|71|Speculative Everything: Design, Fiction, and Social Dreaming|A. Dunne and F. Raby|Ben May 30, 2014|
|72|Optical Code Division Multiple Access: A Practical Perspective|K. Kitayama|Ben May 30, 2014|
|72|Digital VLSI Chip Design with Cadence and Synopsys CAD Tools|E. Brunvand|Ben June 30, 2014|
*Available Software List (BENLAB Internal usage only)[#gbe58ecb]
- Visual Studio 2008, English
- Windows 7 , ULTIMATE, 32-bit, English
- Windows Vista, ULTIMATE, 32-bit, English
- Windows 7 ULTIMATE, 64-bit, English
- Norton Anti-virus 2011 (Japanese version). Number of licenses: 10. Renew date: End of June 2012.
- SmartDraw 2012, English, Installed on 2 Machines.
*Useful IEEE Online Courses [#g4145cbe]
-[[Useful IEEE Online Courses>http://aslweb.u-aizu.ac.jp/benlab/index.php?ieee-elearning]]
*FPGA [#v526d9e6]
|''User''|''FPGA''|''Borrowing date''|
|Achraf|DE2 board|April 13, 2012|
*Notebooks, PC (Purchased by BENLAB only) [#k114eb28]
|''User''|''Notebook/PC''|''Borrowing date''|''Upgrade''|
|Achraf|iMAC 27-inch|July 1st, 2012| 2x2gb ddr3 1333mhz memory |
|Achraf|Toshiba dynabook T551/58BB|June,2011| 500GB Hard disc|
|Akram|Fujitsu, LIFEBOOK NH77/ED|March 22, 2012| |
|Ochi|Fujitsu, DTS UltraPc II|April 27, 2012| |
|Akram| 1TB External Hard disc |October 4, 2013| |
|Achraf| 1TB External Hard disc |October 4, 2013| |
*Verilog-HDL source code [#e8166ee3]
-[[Internal/Verilog]]
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