Design of Matrix Processing Unit on an Open Source Processor
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[[Available Research Topics]]
* Design of Matrix Processing Unit on an Open Source Processor [#hc2f019c]
The goal of this research is to obtain high performance processor for image and movie recognition. Almost of learning algorithms use matrix operations to find optimal solutions. Your goal is to implement an effective module to multiply matrices on a RISC-V and it’s tool chains that can implement complite computer systems.
* Research Outline [#ee9ee1dd]
We are going to use RISC-V the latest free processor destributed in here.
The research step will be;
+ Understanding tool chain, and boot scheme
+ Write a small program on the simulater
+ Understanding Chisel hardware description language
+ Understanding hardware components
+ Add new instructions and arithmetic units for matrix operation
* Expected Output [#a1b26c7e]
You will write 4 documents (that will be used to wrinte your thesis) show in below
+Instruction guide running RISC-V simulator
+Overview of datapath for RISC-V processor
+How to modify datapath, to add instructions
+Specification of matrix multiplication unit
+ And your theses
* References [#fd730d7c]
- [[FPGAにMatrix Unitを実装したときの論文>http://ieeexplore.ieee.org/xpl/abstractReferences.jsp?arnumber=6949477]]
- [[RISC-V>http://riscv.org/]]
-- Google, Oracle, HP等の有名企業が出資している
-- Ubuntuでシミュレータ一式が走る
終了行:
[[Available Research Topics]]
* Design of Matrix Processing Unit on an Open Source Processor [#hc2f019c]
The goal of this research is to obtain high performance processor for image and movie recognition. Almost of learning algorithms use matrix operations to find optimal solutions. Your goal is to implement an effective module to multiply matrices on a RISC-V and it’s tool chains that can implement complite computer systems.
* Research Outline [#ee9ee1dd]
We are going to use RISC-V the latest free processor destributed in here.
The research step will be;
+ Understanding tool chain, and boot scheme
+ Write a small program on the simulater
+ Understanding Chisel hardware description language
+ Understanding hardware components
+ Add new instructions and arithmetic units for matrix operation
* Expected Output [#a1b26c7e]
You will write 4 documents (that will be used to wrinte your thesis) show in below
+Instruction guide running RISC-V simulator
+Overview of datapath for RISC-V processor
+How to modify datapath, to add instructions
+Specification of matrix multiplication unit
+ And your theses
* References [#fd730d7c]
- [[FPGAにMatrix Unitを実装したときの論文>http://ieeexplore.ieee.org/xpl/abstractReferences.jsp?arnumber=6949477]]
- [[RISC-V>http://riscv.org/]]
-- Google, Oracle, HP等の有名企業が出資している
-- Ubuntuでシミュレータ一式が走る
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