星野/日誌/2011-01-31
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開始行:
[[星野/日誌]]
-Soft CPU Cores for FPGA
In this article popular RISC CPU cores suitable for FPGA implementation
are described and compared (LEON, OpenRISC, MicroBlaze, Nios II,
Cortex-M1 and others).
--http://www.1-core.com/library/digital/soft-cpu-cores/
-FPGA Logic Cells Comparison
In this article we compare logic cells architectures that are used in
modern FPGAs: Xilinx (both Virtex-5 and earlier), Altera and Actel.
--http://www.1-core.com/library/digital/fpga-logic-cells/
-Multi-processor solutions for FPGA
Multiple soft-core processors can also be used as a divide
and conquer strategy to improve overall system performance
or to uninstall the existing processor tasks, this strategy
only by the target FPGA logic and memory resource constraints.
--http://tech.icfull.com/201011/Multi-processor-solutions-for-FPGA_4406.html
-POWER/AREA ANALYSIS OF A FPGA-BASED OPEN-SOURCE PROCESSOR USING
PARTIAL DYNAMIC RECONFIGURATION (PDF)
This paper explores the utilization of run-time Partial
Dynamic Reconfiguration in the LEON3 open-source soft core processor
--http://rose.bris.ac.uk/dspace/bitstream/1983/1323/1/zaidi_IEEE_DSD_2008.pdf
----
- 英語圏の記事を探すスキルがほしい。 -- &new{2011-02-01 (火) 11:50:19};
- tag: FPGA, AREA, LEs, Power, Power Consumption, Power Decipation, Micro Processor, Soft-Core -- &new{2011-02-01 (火) 11:59:29};
#comment
終了行:
[[星野/日誌]]
-Soft CPU Cores for FPGA
In this article popular RISC CPU cores suitable for FPGA implementation
are described and compared (LEON, OpenRISC, MicroBlaze, Nios II,
Cortex-M1 and others).
--http://www.1-core.com/library/digital/soft-cpu-cores/
-FPGA Logic Cells Comparison
In this article we compare logic cells architectures that are used in
modern FPGAs: Xilinx (both Virtex-5 and earlier), Altera and Actel.
--http://www.1-core.com/library/digital/fpga-logic-cells/
-Multi-processor solutions for FPGA
Multiple soft-core processors can also be used as a divide
and conquer strategy to improve overall system performance
or to uninstall the existing processor tasks, this strategy
only by the target FPGA logic and memory resource constraints.
--http://tech.icfull.com/201011/Multi-processor-solutions-for-FPGA_4406.html
-POWER/AREA ANALYSIS OF A FPGA-BASED OPEN-SOURCE PROCESSOR USING
PARTIAL DYNAMIC RECONFIGURATION (PDF)
This paper explores the utilization of run-time Partial
Dynamic Reconfiguration in the LEON3 open-source soft core processor
--http://rose.bris.ac.uk/dspace/bitstream/1983/1323/1/zaidi_IEEE_DSD_2008.pdf
----
- 英語圏の記事を探すスキルがほしい。 -- &new{2011-02-01 (火) 11:50:19};
- tag: FPGA, AREA, LEs, Power, Power Consumption, Power Decipation, Micro Processor, Soft-Core -- &new{2011-02-01 (火) 11:59:29};
#comment
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