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開始行:
[[三浦/Paper Reading]]
last update:May 11, 2009
PNoC:a flexible circuit-switched NoC for FPGA-based systems
Date:May 2009
#contents
*Summary [#i818c49f]
**Abstract [#yd98bcf1]
-NoCs promise to overcome the scalability problems found in bus-based interconnect.
-Circuit-switched networks are an intriguing alternative, which promise high communication rates and predictable communication latencies.
-A new lightweight circuit-switched architecture called programmable NoC(PNoC).
**I.Introduction [#m27827ed]
-Known as SoCs, these systems usually contain a mixture of CPUs, memories and custom hardware modules.
#br
-The inner-module communiction mechanisms employed on SoCs and PSoCs have recently received signification attention for at least two reason.
--First, traditional bus-based communication mechanisms do not scale well with increaseing system complexity and become a bottleneck as system complexities continue to increase.
--Second, design and verification times for complex system continue to grow, that is, the desire for efficiencies in design and verification methodologies argues for standardised communication mechanisms instead of ad hoc direct module interconnections.
#br
-Shared buses are commonly used communication mechanisms in SoCs and PSoCs.
-They support a modular design approach that uses standard interfaces and allow for IP re-use.
--However, the bus is often the performance bottleneck in a large system.
-Hybrid bus or direct-interconnection architecture that allows for direct module-to-module connections in addition to the bus interconnec.
-Hybrid approaches scale better than purely bus-based schemes.
--But they complicate the design process because they reduce the modularity of the system and require custom hardware design for the module-to-module connection.
#br
-Another alternative would involve the use of multiple buses or bus segments to alleviate the load on the main bus.
-This would allow for local communication between modules on the same bus segment without causing congestion to the rest of the bus.
-The disadvantages ro this approach are its reduces flexibility and scalability, and its complication of the design process.
#br
-Network architectures can be divided int two categories, packet-switched and circuit-switched .
Packet-switched
--In packet-switched approach, the data are broken into packet, each of which contains routing information.
--These packets are injected int the network where they are independently routed to the desired destinnaton.
--Packet-switched networks often allow for high aggregate system bandwidch, as many packets can be in flight as a given instant.
--However, they generally require congestion control and packets awaiting the availability of the routing resources.
Circuit-switched
--With circuit-switching, a dedicated connection path (a virtual circuit) between two nodes is established before communication takes place.
--Once the virtual circuit is established, raw data can be freely transferred with very low overhead between the modules until the virtual circuit is no longer needed, at which time it can be closed.
--As a result, the circuitry required for a circuit-switched network is relatively simple and appropriate for use in even small systems.
--The flexibility of the proposed approach makes it suitable in a variety of topologies from rings to meshes to irregular structures.
--Achieving very close to the peak bandwidth between modules is easily achieved.
#br
-Two problems associated with circuit switching have been mentioned in the past as shortcomings.
--First, setup latency, the time required to build avirtual circuit, must be incurred before any communication between nodes can take place.
---In the system described here, efforts were made to minimise this circuit establishment latency through the use of simple communication protocols.
--The second problem involves idle time on communication links, this will result when connections have been established but no transfers are taling place.
---This is not amajor concern in our system: opening and closing connections are lightweight enought that there is little motivation for nodes to monoplise communication links by leaving them open for long periods of time.
#br
(An omission)
#br
-Our proposed network, PNoC, is designed with three goals in mind.
--Fist, we wanted it to be a flexible networking approach that would be applicable to a wide variety of system requirements.
---Flexibility was desired for both the allowable network topologies as well as the communication data path.
--Second, we wanted a network that simplified system design by providing simple, standard network interfaces and easily understood network protocols.
--Third, we wanted our network to be lightweight, requiring few FPGA resources, and thus suitable for both small and large FPGA-based systems.
*References & keywords [#d875804e]
終了行:
[[三浦/Paper Reading]]
last update:May 11, 2009
PNoC:a flexible circuit-switched NoC for FPGA-based systems
Date:May 2009
#contents
*Summary [#i818c49f]
**Abstract [#yd98bcf1]
-NoCs promise to overcome the scalability problems found in bus-based interconnect.
-Circuit-switched networks are an intriguing alternative, which promise high communication rates and predictable communication latencies.
-A new lightweight circuit-switched architecture called programmable NoC(PNoC).
**I.Introduction [#m27827ed]
-Known as SoCs, these systems usually contain a mixture of CPUs, memories and custom hardware modules.
#br
-The inner-module communiction mechanisms employed on SoCs and PSoCs have recently received signification attention for at least two reason.
--First, traditional bus-based communication mechanisms do not scale well with increaseing system complexity and become a bottleneck as system complexities continue to increase.
--Second, design and verification times for complex system continue to grow, that is, the desire for efficiencies in design and verification methodologies argues for standardised communication mechanisms instead of ad hoc direct module interconnections.
#br
-Shared buses are commonly used communication mechanisms in SoCs and PSoCs.
-They support a modular design approach that uses standard interfaces and allow for IP re-use.
--However, the bus is often the performance bottleneck in a large system.
-Hybrid bus or direct-interconnection architecture that allows for direct module-to-module connections in addition to the bus interconnec.
-Hybrid approaches scale better than purely bus-based schemes.
--But they complicate the design process because they reduce the modularity of the system and require custom hardware design for the module-to-module connection.
#br
-Another alternative would involve the use of multiple buses or bus segments to alleviate the load on the main bus.
-This would allow for local communication between modules on the same bus segment without causing congestion to the rest of the bus.
-The disadvantages ro this approach are its reduces flexibility and scalability, and its complication of the design process.
#br
-Network architectures can be divided int two categories, packet-switched and circuit-switched .
Packet-switched
--In packet-switched approach, the data are broken into packet, each of which contains routing information.
--These packets are injected int the network where they are independently routed to the desired destinnaton.
--Packet-switched networks often allow for high aggregate system bandwidch, as many packets can be in flight as a given instant.
--However, they generally require congestion control and packets awaiting the availability of the routing resources.
Circuit-switched
--With circuit-switching, a dedicated connection path (a virtual circuit) between two nodes is established before communication takes place.
--Once the virtual circuit is established, raw data can be freely transferred with very low overhead between the modules until the virtual circuit is no longer needed, at which time it can be closed.
--As a result, the circuitry required for a circuit-switched network is relatively simple and appropriate for use in even small systems.
--The flexibility of the proposed approach makes it suitable in a variety of topologies from rings to meshes to irregular structures.
--Achieving very close to the peak bandwidth between modules is easily achieved.
#br
-Two problems associated with circuit switching have been mentioned in the past as shortcomings.
--First, setup latency, the time required to build avirtual circuit, must be incurred before any communication between nodes can take place.
---In the system described here, efforts were made to minimise this circuit establishment latency through the use of simple communication protocols.
--The second problem involves idle time on communication links, this will result when connections have been established but no transfers are taling place.
---This is not amajor concern in our system: opening and closing connections are lightweight enought that there is little motivation for nodes to monoplise communication links by leaving them open for long periods of time.
#br
(An omission)
#br
-Our proposed network, PNoC, is designed with three goals in mind.
--Fist, we wanted it to be a flexible networking approach that would be applicable to a wide variety of system requirements.
---Flexibility was desired for both the allowable network topologies as well as the communication data path.
--Second, we wanted a network that simplified system design by providing simple, standard network interfaces and easily understood network protocols.
--Third, we wanted our network to be lightweight, requiring few FPGA resources, and thus suitable for both small and large FPGA-based systems.
*References & keywords [#d875804e]
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