VLSI-Design
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開始行:
//CENTER:SIZE(30){COLOR(green){VLSI@ASL for High-performa...
----
*COLOR(yellow){Cadence Design Tutorials, 2020} [#fdde51f6]
**genus - Synthesis [#n1657c35]
-[[Tutorial from cadence Website>https://www.cadence.com/...
**virtuoso - Schematic and simulation [#oe39b0e0]
[[Tutorial from cadence Website>https://www.cadence.com/e...
**innovus -Place and Route [#o693b353]
-[[Tutorial from cadence Website>https://www.cadence.com/...
*Refreences [#n8aa985c]
-[[VLSI Design at, 2016, Michigan State University>https:...
CENTER:&ref(ASIC_DESIGN_FLOW.png,,30%);
CENTER:Maven Silicon
CENTER:[[Importnat Design Files - GDSII file>https://www....
----
*Xilinx Lisence and Tool Installation Instruction (create...
***Administrator: Vu(d8182106), R.Murkami(m5211126) [#r65...
***Description [#wfcb030c]
-XILINX VIVADO LICENSE for university program [[links>htt...
-LICENSES are created dynamically(floating / Node-Locked ...
***Necessary information for creating are ... [#p5265dcb]
--Host name
--Operating system
--Host ID type(e.g. Ethernet MAC)
--Host ID value
***User records [#hfa60dfd]
|User name|Created Date|License type|
|Ryunosuke Murakami|2017/10/24|Node-Locked|
||||
||||
*OASIS NoC Router Tutorials [#f67acee0]
&ref(OASIS-C1.jpg,,30%);
OASIS-RV1 Chip Layout. JUly 7, 2014.
--Technology: 45nm CMOS Process
--Chip Size: 2.205X2.220 (micron)
--Function: Router for 3D NoC System
--Frequency: 0.91 GHZ COLOR(red){Confirmed}
--Supply voltage: 1.1V
--Power Dissipation: 222.387 uW
--Number of Pins: 557
--Completion Date: July 5th (expected)
*** 1. COLOR(blue){Synthesis} with Design Compiler [#h8a...
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5141153/tasks/CADTut...
*** 2. COLOR(blue){Place & Route} with SoC Encounter [#wc...
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5141153/tasks/CADTut...
***3 COLOR(blue){Design Checking: LVS (Layout-Versus-Sche...
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5141153/tasks/CADTut...
//-Ref. http://www.vtvt.ece.vt.edu/vlsidesign/tutorialCad...
*** 4 COLOR(blue){Post Layout Simulation}: [#d8043644]
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5141153/tasks/CADTut...
//-Ref. http://www.vtvt.ece.vt.edu/vlsidesign/tutorialCad...
*** 5 COLOR(blue){Pad Insertion} [#b252009b]
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5141153/tasks/CADTut...
//-Ref. http://www.vtvt.ece.vt.edu/vlsidesign/tutorialCad...
***6. COLOR(blue){Chip Submission} [#m68fd6e1]
-PDF, PPT, COLOR(red){Completion Date: July 15th}
//-Ref. http://staff.etc.tuiasi.ro/patachen/btme2/btme2%2...
-Ref. http://www.vtvt.ece.vt.edu/vlsidesign/tutorialCaden...
*PHENIC Control Router [#h83761dd]
//COLOR(red){This tutorial will be completed by November ...
*** 1. COLOR(blue){Synthesis} with Design Compiler [#h8a...
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/2014/...
*** 2. COLOR(blue){Place & Route} with SoC Encounter [#wc...
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/2014/...
***3 COLOR(blue){Design Checking: LVS (Layout-Versus-Sche...
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/2014/...
*** 4 COLOR(blue){Post Layout Simulation}: [#d8043644]
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/2014/...
*** 5 COLOR(blue){Pad Insertion} [#b252009b]
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/2014/...
*Reference: MIPS processor Tutorials [#h777697c]
- Complete tutorial of MIPS processor prototyping on ASIC...
[[zip file>http://webfs-int.u-aizu.ac.jp/~benab/doc/VLSI_...
*How to Login and use VDEC tools on zxp035 [#k5253b6c]
- To use VDEC tools on zxp035 machine type the following ...
-- ssh -X zxp035@zxp035.u-aizu.ac.jp
- Password : blm2011
- Type ??tcsh?? to start cshr
- To use VDEC tools type:
-- design_vision (to use Design Compiler)
-- velocity (to use SoC Encounter)
-- simvision (to use Simvision)
* Registerd IPs @ with VDEC Server [#we324bb1]
|IP: 163.143.135|HostName: zxp035|OwnerName: Akram|
|IP: 163.143.123|HostName: zxp007|OwnerName: Yuki|
|IP: 163.143.121|HostName: zxp004|UwnerName: ...|
*Links [#o6c73186]
- http://adaptive.u-aizu.ac.jp/aslint/index.php?VLSI-Desi...
-[[Silicon Wafer Production>https://www.youtube.com/watch...
-[[Importnat Design Files - GDS file>https://www.youtube....
-Several tools for GDSII viewer, etc. https://artwork.com...
----
//COLOR(red){Akram-Kun and Ishikuru-Kun, please cooperate...
終了行:
//CENTER:SIZE(30){COLOR(green){VLSI@ASL for High-performa...
----
*COLOR(yellow){Cadence Design Tutorials, 2020} [#fdde51f6]
**genus - Synthesis [#n1657c35]
-[[Tutorial from cadence Website>https://www.cadence.com/...
**virtuoso - Schematic and simulation [#oe39b0e0]
[[Tutorial from cadence Website>https://www.cadence.com/e...
**innovus -Place and Route [#o693b353]
-[[Tutorial from cadence Website>https://www.cadence.com/...
*Refreences [#n8aa985c]
-[[VLSI Design at, 2016, Michigan State University>https:...
CENTER:&ref(ASIC_DESIGN_FLOW.png,,30%);
CENTER:Maven Silicon
CENTER:[[Importnat Design Files - GDSII file>https://www....
----
*Xilinx Lisence and Tool Installation Instruction (create...
***Administrator: Vu(d8182106), R.Murkami(m5211126) [#r65...
***Description [#wfcb030c]
-XILINX VIVADO LICENSE for university program [[links>htt...
-LICENSES are created dynamically(floating / Node-Locked ...
***Necessary information for creating are ... [#p5265dcb]
--Host name
--Operating system
--Host ID type(e.g. Ethernet MAC)
--Host ID value
***User records [#hfa60dfd]
|User name|Created Date|License type|
|Ryunosuke Murakami|2017/10/24|Node-Locked|
||||
||||
*OASIS NoC Router Tutorials [#f67acee0]
&ref(OASIS-C1.jpg,,30%);
OASIS-RV1 Chip Layout. JUly 7, 2014.
--Technology: 45nm CMOS Process
--Chip Size: 2.205X2.220 (micron)
--Function: Router for 3D NoC System
--Frequency: 0.91 GHZ COLOR(red){Confirmed}
--Supply voltage: 1.1V
--Power Dissipation: 222.387 uW
--Number of Pins: 557
--Completion Date: July 5th (expected)
*** 1. COLOR(blue){Synthesis} with Design Compiler [#h8a...
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5141153/tasks/CADTut...
*** 2. COLOR(blue){Place & Route} with SoC Encounter [#wc...
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5141153/tasks/CADTut...
***3 COLOR(blue){Design Checking: LVS (Layout-Versus-Sche...
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5141153/tasks/CADTut...
//-Ref. http://www.vtvt.ece.vt.edu/vlsidesign/tutorialCad...
*** 4 COLOR(blue){Post Layout Simulation}: [#d8043644]
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5141153/tasks/CADTut...
//-Ref. http://www.vtvt.ece.vt.edu/vlsidesign/tutorialCad...
*** 5 COLOR(blue){Pad Insertion} [#b252009b]
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5141153/tasks/CADTut...
//-Ref. http://www.vtvt.ece.vt.edu/vlsidesign/tutorialCad...
***6. COLOR(blue){Chip Submission} [#m68fd6e1]
-PDF, PPT, COLOR(red){Completion Date: July 15th}
//-Ref. http://staff.etc.tuiasi.ro/patachen/btme2/btme2%2...
-Ref. http://www.vtvt.ece.vt.edu/vlsidesign/tutorialCaden...
*PHENIC Control Router [#h83761dd]
//COLOR(red){This tutorial will be completed by November ...
*** 1. COLOR(blue){Synthesis} with Design Compiler [#h8a...
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/2014/...
*** 2. COLOR(blue){Place & Route} with SoC Encounter [#wc...
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/2014/...
***3 COLOR(blue){Design Checking: LVS (Layout-Versus-Sche...
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/2014/...
*** 4 COLOR(blue){Post Layout Simulation}: [#d8043644]
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/2014/...
*** 5 COLOR(blue){Pad Insertion} [#b252009b]
-[[PPTX>http://aslweb.u-aizu.ac.jp/~m5151161/zxw001/2014/...
*Reference: MIPS processor Tutorials [#h777697c]
- Complete tutorial of MIPS processor prototyping on ASIC...
[[zip file>http://webfs-int.u-aizu.ac.jp/~benab/doc/VLSI_...
*How to Login and use VDEC tools on zxp035 [#k5253b6c]
- To use VDEC tools on zxp035 machine type the following ...
-- ssh -X zxp035@zxp035.u-aizu.ac.jp
- Password : blm2011
- Type ??tcsh?? to start cshr
- To use VDEC tools type:
-- design_vision (to use Design Compiler)
-- velocity (to use SoC Encounter)
-- simvision (to use Simvision)
* Registerd IPs @ with VDEC Server [#we324bb1]
|IP: 163.143.135|HostName: zxp035|OwnerName: Akram|
|IP: 163.143.123|HostName: zxp007|OwnerName: Yuki|
|IP: 163.143.121|HostName: zxp004|UwnerName: ...|
*Links [#o6c73186]
- http://adaptive.u-aizu.ac.jp/aslint/index.php?VLSI-Desi...
-[[Silicon Wafer Production>https://www.youtube.com/watch...
-[[Importnat Design Files - GDS file>https://www.youtube....
-Several tools for GDSII viewer, etc. https://artwork.com...
----
//COLOR(red){Akram-Kun and Ishikuru-Kun, please cooperate...
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![[PukiWiki]](image/pukiwiki.png "[PukiWiki]")
