Akihito Kajikawa
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開始行:
CENTER:SIZE(25){COLOR(blue){Evaluation of Error Detection...
----
-[[OASIS-VP]]
-[[Members-Internal]]
----
CENTER:&ref(R2Rcrc.png,,30%);
#br
CENTER:&ref(3Dpack.jpeg,,50%);
CENTER:COLOR(green){3D-OASIS-NoC flit format}
----
*Contents [#re59951d]
#CONTENTS
**Background [#nec7d6fe]
During the past decade, 3D-Network-on-Chips (3D-NoCs) hav...
Previously, 3D-Fault-Tolerant-OASIS (3D-FTO) has been des...
**Problems and Motivation [#necfd6fe]
In our [[previous research>http://web-ext.u-aizu.ac.jp/~b...
proposed NI, an End-to-End error-detection mechanism base...
-- When using End-to-End detection, the fault occurrence ...
-- At the detection of fault, the transmitter NI resends ...
-- In case where a fault occurs at the first hops, it is ...
-- The previously proposed scheme can detect the presence...
-- The verification was made using test-benches with smal...
**Research goal[#mec7d6fe]
The main goal of this research is to design and implement...
***RPS [#e3620466]
- June 4th, 2015: [[Efficient Error Detection Mechanism f...
- July 2nd, 2015: [[Efficient Error Detection Mechanism f...
***RPR [#g6eea464]
**Research plan[#lec7d6fe]
***Step 1 [#y4f17ca9]
- Understand and run Mr. Ishi's system: [[slides.pdf>http...
- Understand these presentations:
--What is OASIS NoC? [[Slides 1>http://webfs-int.u-aizu.a...
***Step 2 [#g7e0becf]
-Understand [[OASIS 3D-Router Verliog HDL Source Code>htt...
- Run on your won machine these 2 tutorials COLOR(red){(T...
--[[OASIS 3D Router Design Tutorial>http://web-ext.u-aizu...
--[[OASIS 3D Fault Tolerant Router Hardware Physical Desi...
***Step 3 [#p220cb46]
- Investigate about the different approaches for fault de...
- Modify the flit format to host the additional code port...
- Make the necessary modification for the remaining modul...
***Step 4 [#v5e30d43]
- Evaluate the performance of the scheme (Area, power, la...
- If time is enough, design a full 2x2x2 NoC system. (Opt...
***Step 5 [#b827e5ed]
Thesis Writing.
**References [#q0c7d0a8]
-Mitsunari Ishii, COLOR(blue){Design and Evaluation of Ef...
-[[????ʸ?ơ??? (Previous GT)>http://aslweb.u-aizu.ac.jp/a...
-[[CRC_study_in_Hardware_In_Japanese.pdf(????Ĺ???? CRC32 ...
-[[A CRC Verilog description module for a hard real time ...
-OKADA Network Interface: http://aslweb.u-aizu.ac.jp/asli...
-COLOR(red){Run this Tutorial on your machine.}
[[OASIS 3D-Router Hardware Physical Design>http://web-ext...
-Akram Ben Ahmed, Mitsuhiro Nakamura, Abderazek Ben Abdal...
-Akram Ben Ahmed, Abderazek Ben Abdallah, [[OASIS 3D Rout...
**OASIS NoC [#g05fde5d]
-Verilog Source Code: http://aslweb.u-aizu.ac.jp/aslint/i...
**Backup[#w4f759e1]
-[[prev_ishii>Akihito Kajikawa/prev_ishii]]
**Others [#k7a47b2a]
-[[Analysis of Error Recovery Schemes for Networks-on-Chi...
----
Updates:
-July 2, 2015: Added RPR/RPS presentations
終了行:
CENTER:SIZE(25){COLOR(blue){Evaluation of Error Detection...
----
-[[OASIS-VP]]
-[[Members-Internal]]
----
CENTER:&ref(R2Rcrc.png,,30%);
#br
CENTER:&ref(3Dpack.jpeg,,50%);
CENTER:COLOR(green){3D-OASIS-NoC flit format}
----
*Contents [#re59951d]
#CONTENTS
**Background [#nec7d6fe]
During the past decade, 3D-Network-on-Chips (3D-NoCs) hav...
Previously, 3D-Fault-Tolerant-OASIS (3D-FTO) has been des...
**Problems and Motivation [#necfd6fe]
In our [[previous research>http://web-ext.u-aizu.ac.jp/~b...
proposed NI, an End-to-End error-detection mechanism base...
-- When using End-to-End detection, the fault occurrence ...
-- At the detection of fault, the transmitter NI resends ...
-- In case where a fault occurs at the first hops, it is ...
-- The previously proposed scheme can detect the presence...
-- The verification was made using test-benches with smal...
**Research goal[#mec7d6fe]
The main goal of this research is to design and implement...
***RPS [#e3620466]
- June 4th, 2015: [[Efficient Error Detection Mechanism f...
- July 2nd, 2015: [[Efficient Error Detection Mechanism f...
***RPR [#g6eea464]
**Research plan[#lec7d6fe]
***Step 1 [#y4f17ca9]
- Understand and run Mr. Ishi's system: [[slides.pdf>http...
- Understand these presentations:
--What is OASIS NoC? [[Slides 1>http://webfs-int.u-aizu.a...
***Step 2 [#g7e0becf]
-Understand [[OASIS 3D-Router Verliog HDL Source Code>htt...
- Run on your won machine these 2 tutorials COLOR(red){(T...
--[[OASIS 3D Router Design Tutorial>http://web-ext.u-aizu...
--[[OASIS 3D Fault Tolerant Router Hardware Physical Desi...
***Step 3 [#p220cb46]
- Investigate about the different approaches for fault de...
- Modify the flit format to host the additional code port...
- Make the necessary modification for the remaining modul...
***Step 4 [#v5e30d43]
- Evaluate the performance of the scheme (Area, power, la...
- If time is enough, design a full 2x2x2 NoC system. (Opt...
***Step 5 [#b827e5ed]
Thesis Writing.
**References [#q0c7d0a8]
-Mitsunari Ishii, COLOR(blue){Design and Evaluation of Ef...
-[[????ʸ?ơ??? (Previous GT)>http://aslweb.u-aizu.ac.jp/a...
-[[CRC_study_in_Hardware_In_Japanese.pdf(????Ĺ???? CRC32 ...
-[[A CRC Verilog description module for a hard real time ...
-OKADA Network Interface: http://aslweb.u-aizu.ac.jp/asli...
-COLOR(red){Run this Tutorial on your machine.}
[[OASIS 3D-Router Hardware Physical Design>http://web-ext...
-Akram Ben Ahmed, Mitsuhiro Nakamura, Abderazek Ben Abdal...
-Akram Ben Ahmed, Abderazek Ben Abdallah, [[OASIS 3D Rout...
**OASIS NoC [#g05fde5d]
-Verilog Source Code: http://aslweb.u-aizu.ac.jp/aslint/i...
**Backup[#w4f759e1]
-[[prev_ishii>Akihito Kajikawa/prev_ishii]]
**Others [#k7a47b2a]
-[[Analysis of Error Recovery Schemes for Networks-on-Chi...
----
Updates:
-July 2, 2015: Added RPR/RPS presentations
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