Toshiichi Idonuma/Research(English)
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https://adaptive.u-aizu.ac.jp/aslint/index.php?Toshiichi+Idonuma/Research%28English%29
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[[Toshiichi Idonuma]] *Performance Evaluation of "Adaptive Processor" with Minimum Partitioning with CDFG[#t525913e] ***Background [#u25037d5] -Semiconductor has been developed according to Moore's Law. Among them, typical processor are MPU, ASIC, GPU and etc. The MPU can be applied to various calculations however can not obtained to satisfactory computational speed. The ASIC can specialize a application, but has problem are development cost. to be cont... ***Research Motivation [#od52012a] ***Research Goal [#i83aa607] ***Research Plan [#xe4f57db]
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[[Toshiichi Idonuma]] *Performance Evaluation of "Adaptive Processor" with Minimum Partitioning with CDFG[#t525913e] ***Background [#u25037d5] -Semiconductor has been developed according to Moore's Law. Among them, typical processor are MPU, ASIC, GPU and etc. The MPU can be applied to various calculations however can not obtained to satisfactory computational speed. The ASIC can specialize a application, but has problem are development cost. to be cont... ***Research Motivation [#od52012a] ***Research Goal [#i83aa607] ***Research Plan [#xe4f57db]
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