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The continuous increasing demand for higher performance computing systems and aggressive technology scaling has driven the trend of integrating a large number of cores on a single chip. In future generations of high-performance many-core systems, the efficiency of the communication infrastructure is as important as the computation efficiency of individual cores. Conventional electrical Networks-on-Chip (NoCs) are expected to reach their limits with increasing core counts because of high power dissipation and reduced performance.
As indicated in the latest version of ITRS roadmap, photonic wiring is a promising interconnect paradigm for future system-on-chip (SoC) designs that can provide broadband data transfer rates unmatchable by the existing metal interconnects. When combined with Wavelength Division Multiplexing (WDM), multiple parallel optical streams of data are concurrently transferred through a single waveguide. This contrasts with the Electronic Networks-on-Chip (ENoCs) that require a unique metal wire per bit stream. The key to saving power in on-chip photonic communication comes from the fact that once a photonic path is established, the optical data is transmitted in an end-to-end fashion without the need for buffering, repeating, or regenerating.
The photonic switching/routing techniques, configuration and routing algorithm directly affect the performance and power characteristics of future many-core on-chip Photonic communication. In particular, the control module and the path configuration algorithm, which orchestrate the different electrical control function, play a significant role on how both electrical and photonic resources are utilized. In this dissertation, a set of novel photonic routing algorithms and architectures are proposed for future on-chip optical networks.
First, a new low-latency, non-blocking photonic switch/router (NBPS) and its control module capable of handling all photonic communication configuration tasks is proposed. The proposed approach is based on a new hybrid spatial switching mechanism for the photonic data stream transfer and is done by manipulating the state of the broadband switching elements. In addition, the NBPS is based on a Wavelength-Selective-Switching (WSS) for handling all communication configuration tasks.
Second, a new contention-aware path configuration algorithm and architecture for Electro-Assisted Photonic Network-on-Chip (EA-PNoC) is proposed. In addition to the main configuration tasks, the algorithm also decouples the Electronic Control Network (ECN) from the Photonic Communication Network (PCN) in a manner that both photonic and electric domains work independently from each other. The proposed algorithm orchestrates the different path configuration packets processes and significantly alleviates the contention in the ECN.
Third, a low-complexity routing and configuration algorithm for EA-PNoC is proposed. The approach is mainly based on photonic components augmented with a simple electronic control module and a so-called wavelength-shifting mechanism. The main merit of this new approach is to configure the path using photonic devices instead of the typical power-hungry electronic router.
The proposed architectures and algorithms were evaluated with a discrete-event simulator, which incorporates detailed physical models of the photonic components. Results show that we could achieve better energy efficiency, as well as a considerable reduction in the blocking occurrence, which is the main source of latency and bandwidth degradation in conventional EA-PNoCs.
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