Michael Meyer
Fault-tolerant Photonic Network-on-Chip for Reliable Many-core Systems-on-Chip (tentative)
Schedule†
0. Abstract†
- Summary of background info
- Summary of problem
- Summary of results
- Summary of benefits
1. Introduction†
- Explain the problem which we have solved
- Explain why the problem is not already solved or other solutions are ineffective in one or more important ways
- Explain why our solution is worth considering and why is it effective in some way that others are not
- Write how the rest of the paper is structured
2. Related work†
- Details about Photonic NoCs
- Details about Fault Tolerance
3. System Implementation†
- 3.1 Router Micro-architecture (FT Switch + Control)
- You need to have FT routers with different ports(5, 4, 3).
- Explanation of the selection of redundant MRs
Notes:
- Reduction of Crossing in your router means lower insertion loss and lower crosstalk [see Ref. 1 and 2 bellow].
- Reduction of the number of MRRs in your router can offer the benefits in terms of device area and power consumption [see Ref. 1 and 2 bellow].
4. FT Router design Space Exploration†
- Investigate the Latency, area and optical power trade-offs in designing your PHENIC System while varying micro-architectures parameters.
5. Evaluation†
- 5.1 Methodology
- How you evaluated your system
- Performance metrics
- Performance parameters
- 5.2 Results
- Throughput
- Latency
- Fault Tolerance
- Area
- Power
- Compare network with OMesh and Firefly, and EMesh
- Compare the switch with Crossbar, Old Oasis, and some from HKU
5. Conclusions and Future Work†
- Explain the problem which you have solved
- Explain your solution to the problem
- Explain why your solution is good: give some numbers
- Explain why the reader should be impressed by your work
References†
- Use a .bib file from the start
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