Ken Saito の履歴(No.5)

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- ID: s1200049

Background (Problem Definition)†

The huge computing power of many-core multi-processor systems will require very large on-chip and off-chip data transfer rates (> 100TB/s). One efficient technology for transmitting this level of information is the optical interconnects, which promise significant advantages over their electronic counterparts. In particular, optical on-chip interconnect (ONoC)) offers a potentially disruptive technology solution with fundamentally low power dissipation that remains independent of capacity while providing ultra-high throughput and minimal access latency. In addition, when combined with 3D integration technology, ONoC offers advantages over 2D NoC design, such as shorter wire length, higher packing density, and smaller footprint.

Current PHENIC and also conventional Photonic NoC Systems lack an efficient EO/OE interface.

EO/OE Interface Components

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Research Goal†

The goal of this research is to design an Opto-Electronic (EO/OE) Network-Interface for PHENIC NoC System.

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Research Schedule†

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Step 1†

Read these references. Completion Date: July 10, 2015.

Si-Photonics Technology Towards femtoJoule/bit Optical Communication in Many-core Chips (STA2014), Invited Talk, 15th International conference on Sciences and Techniques of Automatic control & Computer Engineering, Dec. 21-23, 2014.

Hybrid Photonic NoC based on Non-blocking Photonic Switch and Light-weight Electronic Router

Low-overhead Path-setup Algorithm for Energy-efficient Hybrid Silicon-Photonic Network-on-Chip Systems

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Step 2†

NI design.

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Step 3†

NI Evalaution

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Step 4†

NI perforamcen evalaution

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Step 5†

Thesis Writing

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References†

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PhoenixSim†

Introduction To Network Simulation With OMNET++: A case of PhoenixSim. (PDF)
PhoenixSim 1.0 source files
PhoenixSim 1.0 user manual

PHENIC NoC System Papers:

Photonic Network-on-Chip based on Non-blocking Photonic Switch and Light-weight Electronic Router, to appear in the Proc. of the IEEE International Conference on Systems, Man, and Cybernetics (SMC2015), Oct. 9-12, 2015.

A Fault-tolerant Optical Router for Highly-reliable Low-power Mesh-based Optical Networks-on-Chip in Many-core Systems-on-Chip,to appear in the Proc. of the IEEE International Conference on Systems, Man, and Cybernetics (SMC2015), Oct. 9-12, 2015.

Achraf Ben Ahmed, Yuichi Okuyama, Abderazek Ben Abdallah, "Non-blocking Electro-optic Network-on-Chip Router for High-throughput and Low-power Many-core Systems", Prof. of IEEE CSP of World Congress on Information Technology and Computer Applications 2015, Hammamet, Tunisia, June 11-13, 2015

Achraf Ben Ahmed, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC),International Conference on Information Science and Control Engineering, 04/2015.

A. Ben Abdallah, Si-Photonics Technology Towards femtoJoule/bit Optical Communication in Many-core Chips (STA2014), Invited Talk, 15th International conference on Sciences and Techniques of Automatic control & Computer Engineering, Dec. 21-23, 2014.

A. Ben Abdallah, On-Chip Optical Interconnects: Prospects and Challenges, Invited Talk, 6th International Conference of Soft Computing and Pattern Recognition, August 11-14, 2014

Achraf Ben Ahmed, A. Ben Abdallah, PHENIC: Towards Photonic 3D-Network-on-Chip Architecture for High-throughput Many-core Systems-on-Chip, IEEE Proceedings of the 14th International conference on Sciences and Techniques of Automatic control and computer engineering (STA'2013), Dec. 2013. [DOI]

A. Ben Abdallah, PHENIC: Silicon Photonic 3D-Network-on-Chip Architecture for High-performance Heterogeneous Many-core System-on-Chip>PDF, Technical Report, Ref. PTR0901A0715-2013, September 1, 2013.