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A presentation of individual research progress
Date Presenters absentee(reason) Notes April 10 Hoshino,Masuda April 17 Maekawa,Masuda April 24 Hoshino,Maekawa May 1 Haga,Reo,Mori,Miura May 8 Hoshino,Maekawa,Masuda Reo May 15 Haga,Reo,Mori,Miura Reo May 22 Hoshino,Maekawa,Masuda Masuda,Mori May 29 Haga,Reo,Mori,Miura June 5 Masuda,Haga,Reo,Mori,Miura June 12 Maekawa,Haga,Reo,Mori,Miura June 19 Hoshino,Haga,Reo,Mori,Miura Reo June 26 Masuda,Haga,Reo,Mori,Miura July 3Maekawa,Haga,Reo,Mori,Miura- Business trip: Prof.Ben July 10 Maekawa,Haga,Reo,Mori,Miura Masuda,Reo July 17 Hoshino,Haga,Reo,Mori,Miura Reo July 24 Masuda,Haga,Mori,Miura Reo Practice of FAN2009 presentation July 28 (Tues) Masuda,Haga,Mori,Miura - Practice of FAN2009 presentation July 31Masuda,Haga,Reo,Mori,Miura- Aug. 3 (Mon) Masuda,Haga,Mori,Miura - Aug. 7 Masuda + Masuda,Haga,Mori,Miura Masuda,Reo Aug. 12(Wed) Miura - Aug. 14 Masuda + Masuda, Haga,Mori,MiuraReo Aug. 17(Mon) Haga - Sep. 25 (Fri) Hoshino, Maekawa,Masuda, Haga,Reo,Mori,Miura
Journals papers and conferences:
- The QC-2 Parallel Queue Processor Architecture, Journal of Parallel and Distributed Computing, Vol. 68, No. 2, (2008), pp. 235– 245.
- Modular Design Structure and High-Level Prototyping for Novel Embedded Processor Core", International Conference on Embedded and Ubiquitous Computing (EUC2005), LNCS Vol.3824, pp. 340-349, 2005 |PDF|SLIDES|
- Queue Processor for Novel Queue Computing Paradigm Based on Produced Order Scheme, IEEE computer Society, Proc. of the The 7th High Perfomance Computing and Grid in Asia Pacific Region (HPCAsia2004), pp. 169-177, July 2004.
Techinical Reports:
- QueueCore - The Strong Wave!, Technical report, Ref: QC2MY07BAA, May 2007
- QC-1 Processing Stages Algorithms,Technical Report, Ref: TRQC1PSA03, UEC, IS, October
- QueueCore Instruction Set Architecture,Technical Report, Jan. 2003-2005.
- QueueCore Data Path (earlier version), Technical Report, IS, UEC,Oct., 2002.
