OASIS-VP-Topic-2 の履歴(No.4)

• 履歴一覧
• 差分 を表示
• 現在との差分 を表示
• ソース を表示
• OASIS-VP-Topic-2 へ行く。
  • 1 (2016-05-04 (水) 10:57:08)
  • 2 (2016-05-04 (水) 11:11:02)
  • 3 (2016-05-06 (金) 02:53:23)
  • 4 (2016-05-06 (金) 07:18:43)
  • 5 (2016-05-06 (金) 12:06:18)

OASIS-VP

Overview†

This project is implementation and evaluation of soft error resilience method for 3D Network-on-Chip.

Research Description†

CENTER:

This project is an extended version of OASIS router with two techniques to handle the hard errors:

• Random Access Buffer (RAB): when a fault occurs in a buffer slot, RAB isolates this faulty buffer slot then maintain the operation of the buffer.
• Bypass-link-on-Demand (BLoD): when a fault occurs in a crossbar link, BLoD replaces the faulty link by a back-up link and maintain the connection.

Expected Output†

• Read and understand the architecture and operation of OASIS Network-on-Chip.
• Understand the hard error resilience methods for OASIS Network-on-Chip:
  • Random Access Buffer
  • Bypass-link-on-Demand
• Run and performance evaluate and extract the results.
• Compare the performance of the original OASIS and the Hard Error Resilience architecture.

References†

• Documents: Link, Source code (OASIS)

[0] OASIS internal page: http://aslweb.u-aizu.ac.jp/aslint/index.php?OASIS

[5] Source code: hard-ft.zip: hard error router; baseline-hlaft: OASIS router, tb.zip: Test bench files