Mark Ogbodo の履歴(No.35)

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Fault-tolerant Spiking Neuromorphic System based on 3D-NoC and On-chip Learning

Research Background†

With the increasing demand for computing machines that more closely model the biological brain, the field of neuro-inspired computing has progressed to the exploration of Spiking Neural Networks (SNN). SNN is the third generation of the computing paradigm "Neuro-inspired computing", modeled after the neural networks of the biological brain to best the setbacks of conventional Von Neumann architecture. This computing paradigm tries to model specifications that make the biological brain achieve rapid parallel computations in real-time, fault tolerance, power efficiency, and the ability to perform tasks like image recognition and language learning, that the conventional computing machine cannot. Unlike its predecessors, the neurons in SNN mimic the information transfer in biological neurons (event triggered), and this immensely enhances its performance.

Research in SNN has experienced some success over the years with most of its simulation in software. However on the software platform, it is still faced with the architecture and power limitations of the Von Neumann architecture, which prevents its full potential from being utilized. To remedy this, hardware implementations (neuromorphic chips) that do not have the architectural limitation of the Von Neumann architecture, and aim at taking advantage of the sparsity of Spikes in SNN to reduce power, are presented as an alternative.

implementing in hardware a spiking neuromorphic chip with massive number of synapses requires building small sized spiking neuro cores with low power consumption, efficient neurocoding scheme, light weight on chip learning and fault tolerance.

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Research Goal†

The goal of this Doctoral thesis is to research and implement a Deep Spiking Neural Network Architecture with on-chip learning scheme and based on the previously developed schemes NASH1

The expected outputs from this research are:

(1) An efficient adaptive configuration method which enables reconfiguration of different SNN parameters (spike weights, routing, hidden layers, topology, etc.)
(2) An Efficient Multicast Fault-tolerant Routing Algorithm for the neurochip
(3) Efficient on-chip learning Algorithm
(4) To demonstrate the performance of the algorithms and the system, an FPGA implementation shall be developed and evalauted with several biological SNNs. In addition, a VLSI implementation shall be also developed.

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Research schedule - ===> archive †

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October 31-->Nov. 4, 2019†

10/31 Hardware Implementation of learning algorithm on SNPC
- submit a new conference
- Draft_v1.0 (11/04/2019, Time:03:55 PM) (latex, pdf)

Draft_v1.1 (11/08/2019, Time:03:26 PM) (latex, pdf)

Draft_v1.2 (11/18/2019, Time:05:16 PM) (latex, pdf)

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Special Readings†

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Nov 1 -->8, 2019, 6 PM†

Read this reference AND/OR this reference
- Neurocube Summary (11/28/2019, Time:7:52 PM) Slides.pptx;

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Nov. 29 (Fri) Dec6, 2019.†

Read this reference, A 65-nm Neuromorphic Image Classification Processor With Energy-Efficient Training Through Direct Spike-Only Feedback, 2019.

uplaod slides here.

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Dec. 30, 2019†

Read this arcticle A Review of Spiking Neuromorphic Hardware Communication Systems, Aaron R. Young, Mark E. Dean, James S. Plank //and Garrett S. Rose, September, 2019, IEEE Access

uplaod slides here.

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Achievement†

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On-going Conference and Jnl papers†

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Conferences†

Design and Evaluation of SNPC for (IEEE_BigCom2020) conference. Full paper submisison due date: Sept 30, 2019
- Draft_v1.0 (08/02/2019, Time:08:03 PM) (latex, pdf)

Draft_v1.1 (08/21/2019, Time:02:28 PM) (latex, pdf)

Draft_v1.2 (08/23/2019, Time:02:28 PM) (latex, pdf)

Draft_v1.3 (08/21/2019, Time:08:27 PM) (latex, pdf)
Draft_v1.4 (09/23/2019, Time:12:58 PM) (latex, pdf)

Draft_v1.5 (09/25/2019, Time:05:19 PM) (latex, pdf)

Draft_v1.6 (10/01/2019, Time:05:00 PM) (latex, pdf)

Light-weight Spiking Neuron Processing Core for Large-scale 3D-NoC based Spiking Neural Network Processing Systems(Submitted Copy) (10/01/2019, Time:05:14 PM) (latex, pdf)

The ACM Chapter International Conference on Educational Technology, Language and Technical Communication (ETLTC). Full paper submisison due date: Nov. 19, 2019
- Spiking Neuro-core for 3D-NoC Neuromorphic System. (11/18/2019, Time:01:36 PM) (Word, pdf)

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