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Spiking neural networks (SNNs) are a useful tool for many applications, such as robotic control and pattern recognition. However, simulating a large network in real-time requires high-performance machines or accelerators. Typical accelerators for large-scale SNN accelerators use GPUs or ASIC chips. While ASICs deliver high performance, they lack the flexibility to reconfigure and hence are unable to adapt variation in the design and models employed. GPUs have better speedup over multi-core CPUs and good flexibility, but it lacks scalability to handle larger networks.
The goal of this research is to implement a spiking neural network accelerator on FPGA for emulating large-scale SNN. FPGA SNN can be configured for multiple applications through programming of neuron spike firing threshold potentials, synaptic weights and the SNN interconnection topology.
