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Efficient Convolution Neural Network Optimization on FPGA for Low-power (Distributed) Edge Applications
Research on Artificial Intelligence(AI) is actively conducted today. There is a wide variety methods of AI, such as genetic algorithm, reinforcement learning and deep learning. Among them, I focus on convolutional neural networks(CNNs), which is one of the network models of deep learning. CNN is used in several cases; especially image recognition and speech recognition.
I try to implement CNNs on FPGA for low-power Edge applications.
Research Goal†
- To optimize CNN with Fixed point implementation and keep almost the same accuracy.
- Use Xilinx board and Vivado design tool
- Use MNIST data set for evaluation
- Study the power consumption, the complexity, the accuracy, the execution time
Research schedule†
Step 1†
- Read papers, Book: April - June
- For June 4, 2019. Prepare slides and include: Title, Research Motivation, Research Goal, Schedule.
- Run the Digit Recognition code on your dektop. Make a summary. Due date: June 7, 2019.
- Run the PostCode Python code on your desktop. Make a summary. Due date: Junme 21, 2019.
- Describe the CNN architecture and the optimization techniques
- MS exam document preparation (recommendation, research proposal and plan), From June 3 -
- GS exam rehearsal
- GS Examination, July 13, 2019.
Step 2: CNN Partition for FPGA implementation†
CNN partition for FPGA implementaiton
Report progress on September 12, 2019. Tiume: 4 PM
Step 2: CNN Optimization for FPGA implementation†
Date: TBD
If we have a good result, you can submit a paper to: http://www.bigcomputing.org/
If not, we will submit to another conf.
References†
![[PukiWiki]](image/pukiwiki.png "[PukiWiki]")
mn_20190604.pdf