ADAPTIVE BRAIN-INSPIRED ACCELERATORS/CHIPS & APPLICATIONS

Current Research Members:  Prof. Ben Abdallah AbderaezkD2 Vu Huy TheM2 RyunosukeM2 Yuji Murakami, B4 Yoshiki Tanaka, B4 Shinji Hironaka


In recent years, neuroscience research has revealed a great deal about the structure and operation of individual neurons, and medical tools have also revealed a great deal about how neural activity in the different regions of the brain follows a sensory stimulus. Moreover, the advances of software-based Artificial Intelligence (AI) have brought us to the edge of building brain-like functioning devices and systems overcoming the bottleneck of the conventional von Neumann computing style.  The neuro-inspired technology based on spiking neural network (SNN) is one of the efficient solutions for brain-inspired cognitive computing in both learning and inference tasks.  Hardware implementations of spiking neural network systems are power-efficient and effective methods to provide cognitive functions on a chip compared with the conventional stored-program computing style.   Energy-efficient devises/accelerators for neural-networks are needed for power-constrained devices, such as smartphones, drones, robots, and autonomous-driving cars. We are investigating energy-efficient devices and accelerators for NNs on FPGA and ASIC.  We are also investigating how to map the latest deep learning algorithms to application-specific hardware and emerging devices/systems to achieve orders of magnitude improvement in performance and energy efficiency. Currently, we are  investigating the following four main themes:

  • Neuro-inspired/Neuromorphic Architectures:  Conventional hardware (i.e. VLSI, FPGAs) and innovative hardware (i.e., memristor) implementation of Neuro-inspired systems; Neural circuits; Stochastic hardware; Reliable scalable interconnects.
  • Neuro-inspired Algorithms and Theories: Learning algorithms, emerging hardware algorithms
  • Neuro-inspired Applications: Self-driving Vehicles; Autonomous Mobile Robots

SP4. NASH – Neuro-inspired ArchitectureS in Hardware  

  • The H. Vu, Ryunosuke Murakami, Yuichi Okuyama, Abderazek Ben Abdallah, ”Comprehensive Analytic Performance Assessment and Low-latency Algorithm for Spike Traffic Routing in 3D-NoC of Spiking Neurons (3DNOC-SNN)”,  submitted to the ACM Journal on. Emerging Technologies in Computing (JETC), July 2018.
  • The H. Vu, Ryunosuke Murakami, Yuichi Okuyama, Abderazek Ben Abdallah, ”Efficient Optimization and Hardware Acceleration of CNNs towards the Design of a Scalable Neuro-inspired Architecture in Hardware”, IEEE International Conference on Big Data and Smart Computing (BigComp-2018), January 15-18, 2018. [slides.pdf]
  • The H. Vu, Ryunosuke Murakami, Yuichi Okuyama, Abderazek Ben Abdallah, ”Comprehensive Analytic Performance Assessment and Low-latency Algorithm for Spike Traffic Routing in 3D-NoC of Spiking Neurons (3DNoC-SNN)”, Submitted to the ACM Journal on Emerging Technologies in Computing Systems (JETC), 7/2018.
  • Abderazek Ben Abdallah, Keynote Speech, 2018 International Conference on Intelligent Autonomous Systems (ICoIAS’2018), March 1-3, 2018, Singapore. Title: ”Neuro-inspired Computing Systems & Applications.” [slides.pdf]
  • Book: Abderazek Ben Abdallah (Author), ”Advanced Multicore Systems On-Chip: Architecture, On-Chip Network, Design”, Publishers: Springer; 1st ed, 2017, ISBN-13: 978-9811060915, ISBN-10: 98110609162017.

SP3. Animal Recognition and Identification with Deep Convolutional Neural Networks for Farm Monitoring

  • Ryunosuke Murakami, Yuichi Okuyama, Abderazek Ben Abdallah, ”Animal Recognition and Identification with Deep Convolutional Neural Networks for Farm Monitoring”, Information Processing Society Tohoku Branch Conference, Feb. 10, 2018. [slides.pdf]

SP2: Neural Network System for Traffic-Light Recognition in Autonomous Vehicles

  • Yuji Murakami, Yuichi Okuyama, Abderazek Ben Abdallah, ”SRAM Based Neural Network System for Traffic-Light Recognition in Autonomous Vehicles”, Information Processing Society Tohoku Branch Conference, Feb. 10, 2018.  [slides.pdf]

SP1: Hardware Design of a Leaky Integrate and Fire Neuron Core for NASH System

  • Kanta Suzuki, Yuichi Okuyama, Abderazek Ben, Abdallah, ”Hardware Design of a Leaky Integrate and Fire Neuron Core Towards the Design of a Low-power Neuro-inspired Spike-based Multicore SoC”, Information Processing Society Tohoku Branch Conference, Feb. 10, 2018. [slides.pdf]

 

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