Achraf Ben Ahmed, ”High-performance Scalable Photonics On-chip Network for Many-core Systems-on-Chip”, Ph.D. Thesis, Graduate School of Computer Science and Engineering, The University of Aizu, March 2016, [thesis.pdf],[slides.pdf]

Research Advisor: Prof. Abderazek Ben Abdallah


The continuously increasing demand for higher performance computing systems and aggressive technology scaling has driven the trend of integrating large number of cores in a single chip. In future generations of high-performance many-core systems, the efficiency of the communication infrastructure is as important as the computation efficiency of individual cores. Conventional electrical Networks-on-Chip (NoCs) are expected to reach their limits with increasing core counts because of high power dissipation and reduced performance. As indicated in the latest version of ITRS roadmap, the photonic wiring is a promising interconnect paradigm for future system-on-chip (SoC) designs that can provide broadband data transfer rates unmatchable by the existing metal interconnects. When combined with Wavelength Division Multiplexing (WDM), multiple parallel optical streams of data are concurrently transferred through a single wave-guide. This contrasts with the Electronic Networks-on-Chip (ENoCs) that require a unique metal wire per bit stream. The key to saving power in on-chip photonic communication comes from the fact that once a photonic path is established, the optical data is transmitted in an end-to-end fashion without the need for bu ffering, repeating, or regenerating. The photonic switching/routing techniques, con figuration and routing algorithm directly a ffect the performance and power characteristics of future many-core on-chip Photonic communication. In particular, the control module and the path confi guration algorithm, which orchestrate the di fferent electrical control function play a signi ficant role on how both electrical and photonic resources are utilized. In this dissertation, a set of novel photonic routing algorithms and architectures are proposed for future on-chip optical networks. First, a new low-latency, non-blocking photonic switch/router (NBPS) and its control module capable of handling all photonic communication con figuration tasks is proposed. The proposed approach is based on a new hybrid spatial switching mechanism for the photonic data stream transfer and is done by manipulating the state of the broadband switching elements. In addition, the NBPS is based on a Wavelength-Selective-Switching (WSS) for handling all communication configuration tasks. Second, a new contention-aware path con figuration algorithm and architecture for Electro-Assisted Photonic Network-on-Chip (EA-PNoC) is proposed. In addition to the main con figuration tasks, the algorithm also decouples the Electronic Control Network (ECN) from the Photonic Communication Network (PCN) in a manner that both photonic and electric domains work independently from each other. The proposed algorithm orchestrates the di fferent path con figuration packets processes and signi ficantly alleviates the contention in the ECN. Third, a low-complexity routing and configuration algorithm for EA-PNoC is proposed. The approach is mainly based on photonic components augmented with a simple electronic control module and a so-called wavelength-shifting mechanism. The main merit of this new approach is to confi gure the path using photonic devices instead of the typical power-hungry electronic router. The proposed architectures and algorithms were evaluated with a discrete-event simulator, which incorporates detailed physical models of the photonic components. Results show that we could achieve better energy efficiency, as well as a considerable reduction in the blocking occurrence, which is the main source of latency and bandwidth degradation in conventional EA-PNoCs.

オンチップメニーコアシステムのための高性能、高拡 張性フォトニクスオンチップネットワーク ベン アメド アシュラフ

博士号学位のために2016 年3 月に提出


高性能計算システムやより高度な微細化技術への需要の高まりは、単一チップ上に より多くのコアを統合するという手法へと向かわせた。次世代の高性能計算用メニ
ーコアシステムにおいて、効率的な通信基盤は、単独のコアの計算効率と同様に重 要である。現在 electrical Networks-on-chips (NoCS) は、コア数の増加にとも
なう電源不足や性能低下の問題へアプローチする手法として期待されている。 ITRS ロードマップの最新版が示す通り、フォトニックワイアリングは、既存のメ
タルによる相互配線と適合しない広帯域データ転送レートを提供する将来的な system-on-chip (SoC) 設計への有望なパラダイムである。Wavelength Division
Multiplexing (WDM)と組み合わせたとき、複数の並列した光学データストリームは 単一の導波管 (waveguide) に同時に転送される。 これは Electronic Networkson-
Chip (ENoCs) がビットストリームごとに別々のメタル配線を要することと、対 称的である。
光学スイッチング・ルーティング技術、配置手法、ルーティングアルゴリズムは 将来的なメニーコアのオンチップ上光学通信の性能と消費電力の特性に直接影響す
る。とりわけ、異なる電子制御機能を編成する、制御モジュールと経路設定アルゴ リズムは、電気的なリソースと光学的なリソース両方をどうやって利用するかとい
う点で、重要な役割を担っている。本論文では、将来的なオンチップの光学ネット ワークのための、革新的な光学ルーティングアルゴリズムとアーキテクチャのセッ
トを提案している。 第一に、新しい低レイテンシ non-blocking photonic switch/router (NBPS) と、 全光学通信の設定タスクを扱える制御モジュールを提案する。この提案手法は、光 学データストリーム転送のための新しいハイブリッド空間のスイッチング機構をベ ースとし、広帯域スイッチングエレメントの状態を操作することで行われる。くわ えて、このNBPS は、全ての通信設定タスクを扱う Wavelength-Selective-Switching (WSS) の上に成り立っている 第二に、新しい contention-aware 経路設定アルゴリズムとアーキテクチャを提案 する。メインの設定タスクに加えて、このアルゴリズムは、光学的領域と電気的領 域でそれぞれ個別に動作するシステムの、the Electronic Control Network (ECN) を Photonic Communication Network (PCN) から分離させている。本提案手法は、ECN 中の競合の処理をし著し く緩和する、異なるパスセットアップパケットを編成する。 第三に、ハイブリッド光学 Network-on-Chip のための低複雑性ルーティングおよ び設定アルゴリズムを提案する。この手法は主に、シンプルな電気的制御モジュー ルといわゆる wavelength shifting 機構によって強化された光学デバイスをベー スとしている。

Related Publications

  1. Achraf  Ben Ahmed, Tsutomu Yoshinaga, Abderazek Ben Abdallah, “Scalable Photonic Networks-on-Chip Architecture Based on a Novel Wavelength-Shifting Mechanism”, IEEE Transactions on Emerging Topics in Computing, 2017. DOI: 10.1109/TETC.2017.2737016
  2. Achraf Ben Ahmed and A. Ben Abdallah, An Energy-efficient High-throughput Mesh-based Phototonic On-chip Interconnect for Many-core Systems, in The Journal of Photonics, Volume 3, Issue 2, p.15, March 2016.
  3. Achraf Ben Ahmed and A. Ben Abdallah, Hybrid silicon-photonic Network-on-Chip for Future Generations of High-performance Many-core Systems, in The Journal of Supercomputing, Volume 71, Issue 12, October 2015, pp. 4446-4475.
  4. Achraf Ben Ahmed and A. Ben Abdallah, Architecture and design of real-time system for elderly health monitoring, International Journal of Embedded Systems, 2017, Vol.9, No.5, pp.484 – 494.
  5. Achraf Ben Ahmed, M. Meyer, Y. Okuyama, and A. Ben Abdallah, Hybrid Photonic NoC Based on Non-blocking Photonic switch and light-weight electronic router,” in the IEEE Proceeding of the 2015 International Conference on Systems, Man and Cybernetics (SMC), Hong Kong-China, October 2015, pp. 56-61.
  6. Achraf Ben Ahmed, Y. Okuyama, and A. Ben Abdallah, Contention-free routing for hybrid photonic mesh-based network-on-chip systems, in the IEEE proceeding of the 9th International Symposium on Embedded Multicore/Manycore SoCs (MCSoC), Torino-Italia, September 2015, pp.235-242.
  7. Aachraf Ben Ahmed, Y. Okuyama, and A. Ben Abdallah, Non-blocking Electro-optic Network-on-Chip Router for High-throughput and Low-power Many-core Systems, The World Congress on Information Technology and Computer Applications 2015, Hammamet-Tunisia, June 2015, pp.1-7.
  8. Achraf Ben Ahmed, M. Meyer, Y. Okuyama, and A. Ben Abdallah, Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC), in IEEE Proceedings of the International Conference on Information Science and Control Engineering (ICISC), April 2015, pp. 202-206.
  9. Achraf Ben Ahmed and A. Ben Abdallah, PHENIC: Towards Photonic 3D-Network-on-Chip Architecture for High-throughput Many-core Systems-on-Chip, in the IEEE Proceedings of the 14th International conference on Sciences and Techniques of Automatic control and computer engineering, Sousse-Tunisia, December 2013, pp.1-9.

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