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Abderazek Ben Abdallah

[English / 日本語 ]

BenAbdallah2014

Education

  • Ph.D. Degree in Computer Engineering, The University of Electro-Communications at Tokyo (UEC), 2002
  • M.S. Degree in Computer Engineering, Huazhong University of Science and Technology (HUST), 1997
  • B.S. Degree in Electrical Engineering, Huazhong University of Science and Technology (HUST), 1994

Biography

Abderazek Ben Abdallah is a Full Professor of computer science and engineering and the Head of the Division of Computer Engineering, The University of Aizu, Aizu-Wakamatsu, Japan. He received his Ph.D. degree in computer engineering from the University of Electro-Communications at Tokyo, Choufu, in 2002, his M.S degree in computer engineering, and his B.S. degree in electrical engineering from Hauzhong University of Science and Technology, Wuhan in 1997 and 1994, respectively. He has been a Faculty Member at the University of Aizu since 2007. Prior to joining the University of Aizu, he was a Research Associate with the Graduate School of Information Systems (now Graduate School of Informatics and Engineering), The University of Electro-Communications at Tokyo, from 2002 to 2007. He held several visiting professorships at different universities, including The Hong Kong University of Science and Technology, Hong Kong (2010-2013), and Huazhong University of Science and Technology, Wuhan (2010-2016). Dr. Ben Abdallah’s research focuses on the area of adaptive computing, networks-on-chip/system-on-chips, power and reliability-aware architectures, computer architecture, and neuro-inspired computing. He has authored three books, five invited book-chapters, published over 150 journal articles and conference papers in these areas, and given invited talks and courses at several universities and conferences. He is a Senior member of both IEEE and ACM.

Selected Publications

  • Book: Abderazek Ben Abdallah (Author), Advanced Multicore Systems On-Chip: Architecture, On-Chip Network, Design, Publisher: Springer, 2017, ISBN-13: 978-9811060915, ISBN-10: 98110609162017.
  • Khanh N. Dang,  Akram Ben Ahmed, Yuichi Okuyama, and Abderazek Ben Abdallah, ”Scalable Design Methodology and Online Algorithm for TSV-cluster Defects Recovery in Highly Reliable 3D-NoC Systems”, IEEE Transactions on Emerging Topics in Computing, 2017 (in press). DOI: 10.1109/TETC.2017.2762407
  • Achraf  Ben Ahmed, Tsutomu Yoshinaga, Abderazek Ben Abdallah, “Scalable Photonic Networks-on-Chip Architecture Based on a Novel Wavelength-Shifting Mechanism”, IEEE Transactions on Emerging Topics in Computing, 2017 (in press). DOI: 10.1109/TETC.2017.2737016
  • Khanh N. Dang, Akram Ben Ahmed, Xuan-Tu Tran, Yuichi Okuyama, Abderazek Ben Abdallah, ”A Comprehensive Reliability Assessment of Fault-Resilient Network-on-Chip Using Analytical Model”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 25, Issue: 11, pp. 3099 – 3112, Nov. 2017.  DOI:10.1109/TVLSI.2017.2736004
  • Book: Abderazek Ben Abdallah (Author), Multicore Systems-on-Chip: Practical Hardware/Software Design, 2nd Edition, Publisher: Atlantis-press, (2013), ISBN-13: 978-9491216916.
  • Akram Ben Ahmed, A. Ben Abdallah, “Graceful Deadlock-Free Fault-Tolerant Routing Algorithm for 3D Network-on-Chip Architectures”, Jnl of Parallel and Distributed Computing, 74/4 (2014), pp. 2229-2240.
  • Abderazek Ben Abdallah, Arquimedes Canedo, Tsutomo Yoshinaga, Masahiro Sowa, “The QC-2 Parallel Queue Processor Architecture”, Jnl of Parallel and Distributed Computing, 68/2 (2008), pp. 235-245.

Curriculum Vitae

Contact Information

Office: RQ, 2F, 202-A
Phone: 0242-37-2574
Email: benab at u-aizu.ac.jp
Address: The University of Aizu, Aizu-Wakamatsu 965-8580, Japan

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