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Research activities at the Adaptive Systems Laboratory (ASLab) are focusing on computer and system architectures, which are expanding beyond the usual focus on performance to have other quantitative and qualitative criteASL_research_Intro_June2016ria. The quantitative criteria mainly include energy/power consumption. The qualitative criteria include adaptability, efficiency (e.g. performance/area or performance/energy), and reliability which is important in: (1) dynamic environments, where physical context, network topologies, and workloads are always changing, and (2) harsh environments, such as an environment with high radiation (i.e. space missions). There are several enabling techniques or paradigms, such as reconfigurable fabric, ASIP, and neuro-inspired, that allow a computing system to perform such an adaptation to achieve the criteria mentioned above. This is achieved if such adaptive computing systems can monitor themselves, analyze their behavior, learn and adapt to several execution environments while keeping the system’s complexity invisible to the user.

We are engaged in research and development of such an autonomic computing. In particular, we develop adaptive computing systems for incremental learning and adaptation in dynamic and harsh environments targeted for a wide range of applications, including mobile robots, IoT, and motion analysis for activity recognition. This includes coordinated tasks on all system layers ranging from core level architecture to compiler and runtime systems all the way to the system level.

Research Areas

Neuro-inspired Computing Systems and Platform

The biological brain implements parallel computations using a complex structure that is different from the conventional von Neumann or load/store computing style. Our brain is a low-power, fault-tolerant, and high-performance machine! It consumes only about 20W and brain circuits continue to operate as the organism needs even when the circuit (neuron, neuroglia, etc.) is perturbed or died. Hardware implementations of artificial neural networks are efficient and effective methods to provide cognitive functions on a chip compared with conventional von Neumann processors.

Our focus in this area is to develop novel adaptive large-scale neural processing systems to address the full spectrum of applications from autonomous objects (i.e. Internet-on-things) to high-performance computing co-processing. Currently, we are investigating the following topics: Reliable communication networks for neuro-inspired chips/systems; Reconfigurability and adaptability methods; Neuro-inspired architectures building blocks; Models for neurons and synapses; Deep learning models; Conventional hardware (i.e. VLSI, FPGAs) and innovative hardware (i.e., memristor) implementation of Neuro-inspired systems; Software simulation and programming methodologies for Neuro-inspired computing systems; New applications of on-chip learning (i.e., mobile devices, IoT).

Reliable Scalable On-chip Interconnects 

Future computing systems would contain hundreds of components made of processor cores, DSPs, memory, accelerators, and I/O all integrated into a single die area of just a few square millimeters. Such complex system would be interconnected via a novel on-chip interconnect (Network-on-Chip) closer to a sophisticated network than to current bus-based solutions. This network must provide high throughput and low latency while keeping area and power consumption low.

Our research effort in this area is about solving several design challenges to enable the packet-switched and other novel switching schemes in multi and many-core systems/SoCs. In particular, we are investigating the following topics: implementation techniques for TSV based NoCs; 3D-IC integration, fault-tolerant and reliability issues; new topologies and flow-control techniques; Photonic Interconnects.

=> On-going Projects

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